公开(公告)号：US11670215B2

公开(公告)日：2023-06-06

申请号：US17011967

申请日：2020-09-03

Applicant: Samsung Display Co., Ltd.

Inventor： Soo Yeon Kim ,  Tae Gon Im ,  Hee-Jeong Seo

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G2310/0275 ,  G09G2310/061

Abstract: A display device includes a display panel including a plurality of pixels, a controller for providing a clock-embedded data signal including image data in an active period and including a training pattern in a blank period, and a data driver for recovering the image data from the clock-embedded data signal based on an internal clock signal to provide data voltages corresponding to the image data to the plurality of pixels in the active period, and to perform a training operation for the internal clock signal using the training pattern included in the clock-embedded data signal in the blank period. The training pattern in the blank period includes a first training clock signal modulated with a first modulation period during a first time, and includes a second training clock signal modulated with a second modulation period different from the first modulation period after the first time.

公开(公告)号：US11568795B2

公开(公告)日：2023-01-31

申请号：US17347623

申请日：2021-06-15

Applicant: Samsung Display Co., Ltd.

Inventor： Tae Gon Im ,  Min Soo Choi ,  Ji Hyun Kim ,  Jun Pyo Lee

IPC: G09G3/32

Abstract: The display device includes a display panel, a printed circuit board on which a timing controller is mounted, and a connection film on which a data driver is mounted. Pixels and a gate driving circuit are disposed in a display area of the display panel. The connection film includes output lines connecting the data driver and the display panel, and first connection lines connecting the printed circuit board and the display panel. The first connection lines overlap the first area on which the data driver is mounted and are disposed between the output lines.

公开(公告)号：US09830869B2

公开(公告)日：2017-11-28

申请号：US14524535

申请日：2014-10-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Tae Gon Im ,  Song Yi Han ,  Young Sup Kwon ,  Eun Chul Shin

IPC: G09G3/36 ,  G09G3/34 ,  H05B33/08

CPC classification number: G09G3/3607 ,  G09G3/3406 ,  G09G2300/0809 ,  G09G2310/027 ,  G09G2320/0626 ,  H05B33/086

Abstract: A light unit includes a DC/DC converter. A plurality of unit light emitting diode columns receive a voltage applied from the DC/DC converter. A plurality of transistors, respectively, are connected to the plurality of unit light emitting diode columns. A current deviation compensating unit compensates for deviations between currents respectively flowing through the plurality of unit light emitting diode columns by a pulse current width modulation average current control method. A connection switch sequentially connects the current deviation compensating unit with the plurality of transistors. A resistor is connected to output terminals of the plurality of transistors. A switch controller controls connection between the connection switch and the current deviation compensating unit based on a signal applied to the resistor.

公开(公告)号：US12008948B2

公开(公告)日：2024-06-11

申请号：US17739807

申请日：2022-05-09

Applicant: Samsung Display Co., LTD.

Inventor： Soo Yeon Kim ,  Tae Gon Im ,  Jong Jae Lee ,  Dae Gwang Jang

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/0842 ,  G09G2320/0233 ,  G09G2320/0295 ,  G09G2330/028

Abstract: A display device includes pixels; a sensing block generating first sensing data during a first sensing period, and generating second sensing data and third sensing data during a second sensing period; and a timing controller compensating first image data with second image data based on the first sensing data, the second sensing data, and the third sensing data. The sensing block generates the first sensing data corresponding to an initial channel voltage applied to each of sensing channels and at least one auxiliary sensing channel during the first sensing period, generates the second sensing data by sensing characteristic information of the pixels corresponding to an initialization voltage applied to the pixels during the second sensing period, and generates the third sensing data corresponding to a reference voltage applied to the at least one auxiliary sensing channel during the second sensing period.

公开(公告)号：US11875720B2

公开(公告)日：2024-01-16

申请号：US18093031

申请日：2023-01-04

Applicant: Samsung Display Co., LTD.

Inventor： Gwang Teak Lee ,  Tae Gon Im

IPC: G09G3/32 ,  G09G3/20 ,  H01L25/16 ,  G09G3/3233 ,  H01L33/32

CPC classification number: G09G3/2007 ,  G09G3/32 ,  G09G3/3233 ,  H01L25/167 ,  G09G2300/0426 ,  G09G2300/0814 ,  G09G2300/0842 ,  G09G2320/0626 ,  H01L33/325

Abstract: A display device includes a display panel and the display panel includes a pixel. The pixel includes a light emitting unit including at least one light emitting element, a driving transistor providing a driving current corresponding to a data signal to the light emitting unit, and a first transistor electrically connected between both ends of the light emitting unit. A driver provides the data signal to the pixel and provides a duty control signal to the first transistor. The driver varies a voltage level of the data signal in a first grayscale section in which a grayscale corresponding to the data signal is greater than or equal to a reference grayscale, and varies a duty ratio of the duty control signal in a second grayscale section in which the grayscale is less than the reference grayscale.

公开(公告)号：US11443699B2

公开(公告)日：2022-09-13

申请号：US17467482

申请日：2021-09-07

Applicant: Samsung Display Co., Ltd.

Inventor： Tae Gon Im ,  Jong Jae Lee ,  Jun Pyo Lee ,  Byung Kil Jeon ,  Won Hee Lee

IPC: G09G3/3275 ,  G09G5/00 ,  G09G3/32

Abstract: A display device includes a display panel having pixels. A timing controller generates a first control signal and data control signals. Data driving circuits each recover a data signal from a corresponding data control signal of the data control signals in response to the first control signal, generate a data voltage corresponding to the data signal, and provide the data voltage to the display panel. Each of the data driving circuits includes: a setting unit configured to acquire a setting value from the data control signal; an equalizer configured to compensate for distortion of the corresponding data control signal according to the setting value to output compensated data control signal; and a recoverer configured to recover a clock signal from the compensated data control signal and recover the data signal from the compensated data control signal based on the clock signal.

公开(公告)号：US12165565B2

公开(公告)日：2024-12-10

申请号：US17902574

申请日：2022-09-02

Applicant: Samsung Display Co., LTD.

Inventor： Tae Gon Im ,  Jong Jae Lee ,  Soo Yeon Kim ,  Jun Pyo Lee

IPC: G09G3/00 ,  G09G3/20 ,  G09G3/3233 ,  G09G3/3291

Abstract: A display device includes a display panel including data lines, line capacitors respectively connected to the data lines, and pixels receiving a data voltage from the data lines, and a data driver supplying the data voltage to the pixels through the data lines and supplying different charging voltages respectively to the line capacitors through the data line. The data driver senses voltage change of at least one of the data lines occurring in case that at least one of the line capacitors is charged or discharged.

公开(公告)号：US11657768B2

公开(公告)日：2023-05-23

申请号：US17670621

申请日：2022-02-14

Applicant: Samsung Display Co., LTD.

Inventor： Soo Yeon Kim ,  Tae Gon Im ,  Jong Jae Lee ,  Jun Pyo Lee

IPC: G09G3/3275 ,  G09G3/3233

CPC classification number: G09G3/3275 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0295 ,  G09G2320/045 ,  G09G2340/0435

Abstract: A display device includes a display panel including a pixel including a light emitting element emitting light and electrically connected to a data line and a sensing line, a timing controller varying a driving frequency of the display panel based on an input frequency of digital video data, and a data driver supplying a data voltage to the data line based on the digital video data during a data addressing period of a frame period and receiving a sensing signal from the sensing line during a sensing period. The data driver electrically connects the sensing line to an initialization voltage line during the data addressing period in case that the digital video data is changed, and electrically connects the sensing line to a high impedance during the data addressing period in case that the digital video data is not changed.

公开(公告)号：US20210280125A1

公开(公告)日：2021-09-09

申请号：US17011967

申请日：2020-09-03

Applicant: Samsung Display Co., Ltd.

Inventor： Soo Yeon Kim ,  Tae Gon Im ,  Hee-Jeong Seo

IPC: G09G3/20

Abstract: A display device includes a display panel including a plurality of pixels, a controller for providing a clock-embedded data signal including image data in an active period and including a training pattern in a blank period, and a data driver for recovering the image data from the clock-embedded data signal based on an internal clock signal to provide data voltages corresponding to the image data to the plurality of pixels in the active period, and to perform a training operation for the internal clock signal using the training pattern included in the clock-embedded data signal in the blank period. The training pattern in the blank period includes a first training clock signal modulated with a first modulation period during a first time, and includes a second training clock signal modulated with a second modulation period different from the first modulation period after the first time.

公开(公告)号：US11107385B2

公开(公告)日：2021-08-31

申请号：US16938329

申请日：2020-07-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Soo Yeon Kim ,  Ji Ye Lee ,  Hee Jeong Seo ,  Tae Gon Im ,  Jung Hwan Cho

IPC: G09G3/20

Abstract: A display device includes a timing controller which supplies a clock training signal through a data clock signal line and a first control signal through a shared signal line in a first period of one frame, and supplies image data through the data clock signal line in a second period of the one frame, a data driver provided with data driving circuits which generate a clock signal based on the clock training signal and the first control signal in the first period, and generate data voltages based on the clock signal and the image data in the second period, and a pixel part which receives the data voltages from the data driver. The data driver may supply a second control signal indicating a reception state of the data driver to the timing controller through the shared signal line in the second period.