公开(公告)号：US11024227B2

公开(公告)日：2021-06-01

申请号：US16709234

申请日：2019-12-10

Applicant: Samsung Display Co., Ltd.

Inventor： Chong Chul Chai ,  Dong Woo Kim ,  Kyoung Ju Shin ,  Bo Yong Chung

IPC: G09G3/3233 ,  G09G3/3258 ,  H01L27/12 ,  H01L29/786 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/36

Abstract: A pixel includes a plurality of transistors, a storage capacitor, and an organic light emitting diode. A first transistor controls the amount of current from a first driving power source to the organic light emitting diode based on a data voltage. A second transistor is connected to a data line and is turned on based on a scan signal. A third transistor coupled to the first transistor and is turned on based on the scan signal. A first stabilizing transistor is coupled to the third transistor or between the first and third transistors and is turned off when the third transistor is turned off.

公开(公告)号：US10529283B2

公开(公告)日：2020-01-07

申请号：US15811922

申请日：2017-11-14

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Chong Chul Chai ,  Dong Woo Kim ,  Kyoung Ju Shin ,  Bo Yong Chung

IPC: G09G3/3233 ,  G09G3/3266 ,  G09G3/3275 ,  H01L29/786 ,  H01L27/12

Abstract: A pixel includes a plurality of transistors, a storage capacitor, and an organic light emitting diode. A first transistor controls the amount of current from a first driving power source to the organic light emitting diode based on a data voltage. A second transistor is connected to a data line and is turned on based on a scan signal. A third transistor coupled to the first transistor and is turned on based on the scan signal. A first stabilizing transistor is coupled to the third transistor or between the first and third transistors and is turned off when the third transistor is turned off.

公开(公告)号：US09685948B2

公开(公告)日：2017-06-20

申请号：US14456926

申请日：2014-08-11

Applicant: Samsung Display Co., Ltd.

Inventor： Jong Hee Kim ,  Hyun Joon Kim ,  Kyoung Ju Shin ,  Alexander Ward ,  Cheol-Gon Lee ,  Chong Chul Chai

IPC: G09G3/36 ,  H03K17/693

CPC classification number: H03K17/693 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/06

Abstract: A stage includes a first transistor including an input terminal to which a clock signal is applied and a control terminal connected to a first node; a first capacitor including terminals respectively connected to the first node and an output terminal of the first transistor; a second transistor including an input terminal connected to the output terminal of the first transistor, a control terminal connected to a second node, and an output terminal to which a low voltage is applied; a third transistor including an output terminal connected to the second node, a control terminal connected to the first node, and an input terminal to which the low voltage is applied; and a fourth transistor including an input terminal connected to the first node and an output terminal to which the low voltage is applied, wherein the fourth transistor is switched according to an output signal of a next stage.

公开(公告)号：US09158169B2

公开(公告)日：2015-10-13

申请号：US14572169

申请日：2014-12-16

Applicant: Samsung Display Co., Ltd.

Inventor： Kyoung Ju Shin ,  Hak Sun Chang ,  Yong Hwan Shin

IPC: G02F1/1368 ,  G02F1/1362 ,  G02F1/1337 ,  G02F1/1343 ,  G02F1/1333

CPC classification number: G02F1/13624 ,  G02F1/133371 ,  G02F1/133707 ,  G02F1/133753 ,  G02F1/134309 ,  G02F1/136213 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134345 ,  G02F2201/40

Abstract: Provided is a liquid crystal display to provide improved transmittance and visibility includes a first substrate; a first switching element and a second switching element formed on the first substrate configured to be switched by the same signal; a first subpixel electrode connected to the first switching element; a second subpixel electrode connected to the second switching element; a third switching element connected to the second switching element; a third subpixel electrode connected to the third switching element; a second substrate; a common electrode formed on the second substrate; and a liquid crystal layer formed between the first substrate and the second substrate.

公开(公告)号：US10957253B2

公开(公告)日：2021-03-23

申请号：US16709256

申请日：2019-12-10

Applicant: Samsung Display Co., Ltd.

Inventor： Chong Chui Chai ,  Dong Woo Kim ,  Kyoung Ju Shin ,  Bo Yong Chung

IPC: G09G3/3233 ,  H01L29/786 ,  G09G3/3266 ,  G09G3/3275 ,  H01L27/12

Abstract: A pixel includes a plurality of transistors, a storage capacitor, and an organic light emitting diode. A first transistor controls the amount of current from a first driving power source to the organic light emitting diode based on a data voltage. A second transistor is connected to a data line and is turned on based on a scan signal. A third transistor coupled to the first transistor and is turned on based on the scan signal. A first stabilizing transistor is coupled to the third transistor or between the first and third transistors and is turned off when the third transistor is turned off.

公开(公告)号：US10699616B2

公开(公告)日：2020-06-30

申请号：US16017999

申请日：2018-06-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  Keum Nam Kim ,  Sung Hwan Kim ,  Kyoung Ju Shin

IPC: G09G3/20

Abstract: In a scan driver including a plurality of stages configured to supply scan signals to scan lines, the scan driver includes: an i−1th stage configured to supply an i−1th scan signal to an i−1th scan line while controlling a node Qi−1 (i is a natural number) in response to a first clock signal, a third clock signal, and a control voltage; an ith stage configured to supply an ith scan signal to an ith scan line while controlling a node Qi in response to a second clock signal, a fourth clock signal, and the control voltage; and a controller connected to the i−1th stage and the ith stage, and configured to supply the control voltage.

公开(公告)号：US20180308409A1

公开(公告)日：2018-10-25

申请号：US16017999

申请日：2018-06-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  Keum Nam Kim ,  Sung Hwan Kim ,  Kyoung Ju Shin

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286

Abstract: In a scan driver including a plurality of stages configured to supply scan signals to scan lines, the scan driver includes: an i−1th stage configured to supply an i−1th scan signal to an i−1th scan line while controlling a node Qi−1 (i is a natural number) in response to a first clock signal, a third clock signal, and a control voltage; an ith stage configured to supply an ith scan signal to an ith scan line while controlling a node Qi in response to a second clock signal, a fourth clock signal, and the control voltage; and a controller connected to the i−1th stage and the ith stage, and configured to supply the control voltage.

公开(公告)号：US10783832B2

公开(公告)日：2020-09-22

申请号：US15844618

申请日：2017-12-17

Applicant: Samsung Display Co., Ltd.

Inventor： Kyoung Ju Shin ,  Cheol Gon Lee ,  Sang Uk Lim ,  Chang Yong Jeong

IPC: G09G3/3266 ,  G09G3/325 ,  G09G3/3275 ,  G02F1/1343 ,  G09G3/36 ,  G11C19/28

Abstract: A scan driver, includes a plurality of stage circuits, each of which includes a driving circuit unit providing an output signal and an inverter inverting the output signal of the driving circuit unit and generating a scan signal, in which the inverter includes a first transistor and a second transistor, which are complementarily operated, the first transistor is a P-type polysilicon transistor, and the second transistor is an N-type oxide semiconductor transistor. A display device may include the scan driver.

公开(公告)号：US10546536B2

公开(公告)日：2020-01-28

申请号：US15626305

申请日：2017-06-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sung Hwan Kim ,  Jun Hyun Park ,  Kyoung Ju Shin

IPC: G09G3/3266

Abstract: A stage includes first, second, and third outputs and first and second signal processors. The first output supplies a scan signal to a first output terminal based on signals to first and second input terminals and the voltage of a first node. The second output is connected to a first power source and supplies an emission control signal to a second output terminal based on signals to the first input terminal, the first output terminal, and a third input terminal. The third output is connected to the first power source and supplies an inverted emission control signal to a third output terminal based on signals to the first input terminal and second output terminal. The first signal processor controls the first node voltage based on a signal to a fourth input terminal. The second signal processor controls the first node voltage based on the signal to the second input terminal.

公开(公告)号：US20160365052A1

公开(公告)日：2016-12-15

申请号：US15172060

申请日：2016-06-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  Sung Hwan Kim ,  Kyoung Ju Shin

IPC: G09G3/36 ,  G09G3/3258

CPC classification number: G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021

Abstract: A gate driving circuit including a plurality of stage circuits to output a plurality of gate signals, a N-th stage circuit of the plurality of stage circuits includes: an output pull-up part including a control electrode connected to a first node, the first node being configured to have a potential increase in response to a (N−1)-th control signal received from a previous stage circuit of the N-th stage circuit, the output pull-up part to receive a clock signal to output a gate signal of the N-th stage circuit; a control node pull-up part to control the potential of the first node by using the (N−1)-th control signal; and a control node pull-down part to discharge the first node to a second low voltage according to a (N+1)-th control signal, wherein the output pull-up part is to discharge the gate signal of the N-th stage circuit in a (N+2)-th stage circuit.

Abstract translation: 一种栅极驱动电路，包括输出多个栅极信号的多个级电路，所述多级级电路的第N级电路包括：输出上拉部分，包括连接到第一节点的控制电极，所述第一级 节点被配置为响应于从第N级电路的先前级电路接收的第（N-1）个控制信号而具有电位增加，所述输出上拉部分接收时钟信号以输出门 N级电路的信号; 控制节点上拉部分，通过使用第（N-1）个控制信号来控制第一节点的电位; 以及控制节点下拉部分，以根据第（N + 1）个控制信号将所述第一节点放电到第二低电压，其中所述输出上拉部分将所述第N级的所述门信号 （N + 2）级电路中的电路。