公开(公告)号：US08872256B2

公开(公告)日：2014-10-28

申请号：US13796118

申请日：2013-03-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juyul Lee ,  Bumsu Kim ,  Kwangmin Park ,  Hyun Park ,  Jae-Young Ahn ,  Dongchul Yoo ,  Jongsik Chun ,  Kihyun Hwang

IPC: H01L27/105

CPC classification number: H01L27/11582 ,  H01L27/1052 ,  H01L29/7926

Abstract: A three-dimensional (3D) semiconductor memory device includes an electrode separation pattern, a stack structure, a data storage layer, and a channel structure. The electrode separation pattern is disposed on a substrate. A stack structure is disposed on a sidewall of the electrode separation pattern. The stack structure includes a corrugated sidewall opposite to the sidewall of the electrode separation pattern. The sidewall of the electrode separation pattern is vertical to the substrate. A data storage layer is disposed on the corrugated sidewall. A channel structure is disposed on the charge storage layer.

Abstract translation: 三维（3D）半导体存储器件包括电极分离图案，堆叠结构，数据存储层和沟道结构。 电极分离图案设置在基板上。 堆叠结构设置在电极分离图案的侧壁上。 堆叠结构包括与电极分离图案的侧壁相对的波纹状侧壁。 电极分离图案的侧壁垂直于基板。 数据存储层设置在波纹侧壁上。 通道结构设置在电荷存储层上。

公开(公告)号：US09202819B2

公开(公告)日：2015-12-01

申请号：US14493849

申请日：2014-09-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juyul Lee ,  Bumsu Kim ,  Kwangmin Park ,  Hyun Park ,  Jae-young Ahn ,  Dongchul Yoo ,  Jongsik Chun ,  Kihyun Hwang

IPC: H01L27/105 ,  H01L27/115 ,  H01L29/792

CPC classification number: H01L27/11582 ,  H01L27/1052 ,  H01L29/7926

Abstract: A three-dimensional (3D) semiconductor memory device includes an electrode separation pattern, a stack structure, a data storage layer, and a channel structure. The electrode separation pattern is disposed on a substrate. A stack structure is disposed on a sidewall of the electrode separation pattern. The stack structure includes a corrugated sidewall opposite to the sidewall of the electrode separation pattern. The sidewall of the electrode separation pattern is vertical to the substrate. A data storage layer is disposed on the corrugated sidewall. A channel structure is disposed on the charge storage layer.

Abstract translation: 三维（3D）半导体存储器件包括电极分离图案，堆叠结构，数据存储层和沟道结构。 电极分离图案设置在基板上。 堆叠结构设置在电极分离图案的侧壁上。 堆叠结构包括与电极分离图案的侧壁相对的波纹状侧壁。 电极分离图案的侧壁垂直于基板。 数据存储层设置在波纹侧壁上。 通道结构设置在电荷存储层上。

公开(公告)号：US20150041882A1

公开(公告)日：2015-02-12

申请号：US14493849

申请日：2014-09-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juyul Lee ,  Bumsu Kim ,  Kwangmin Park ,  Hyun Park ,  Jae-young Ahn ,  Dongchul Yoo ,  Jongsik Chun ,  Kihyun Hwang

IPC: H01L27/115

CPC classification number: H01L27/11582 ,  H01L27/1052 ,  H01L29/7926

Abstract: A three-dimensional (3D) semiconductor memory device includes an electrode separation pattern, a stack structure, a data storage layer, and a channel structure. The electrode separation pattern is disposed on a substrate. A stack structure is disposed on a sidewall of the electrode separation pattern. The stack structure includes a corrugated sidewall opposite to the sidewall of the electrode separation pattern. The sidewall of the electrode separation pattern is vertical to the substrate. A data storage layer is disposed on the corrugated sidewall. A channel structure is disposed on the charge storage layer.

Abstract translation: 三维（3D）半导体存储器件包括电极分离图案，堆叠结构，数据存储层和沟道结构。 电极分离图案设置在基板上。 堆叠结构设置在电极分离图案的侧壁上。 堆叠结构包括与电极分离图案的侧壁相对的波纹状侧壁。 电极分离图案的侧壁垂直于基板。 数据存储层设置在波纹侧壁上。 通道结构设置在电荷存储层上。