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公开(公告)号:US20180006055A1
公开(公告)日:2018-01-04
申请号:US15708266
申请日:2017-09-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kihyun KIM , Chadong YEO
IPC: H01L27/11582 , H01L27/11556 , H01L27/11524 , H01L27/11548 , H01L27/11575 , H01L27/1157
CPC classification number: H01L27/11582 , H01L27/11524 , H01L27/11548 , H01L27/11556 , H01L27/1157 , H01L27/11575 , H01L27/11578
Abstract: A three-dimensional semiconductor memory device is provided. A stacked structure is formed on a substrate. The stacked structure includes conductive patterns vertically stacked on the substrate. A selection structure including selection conductive patterns is stacked on the stacked structure. A channel structure penetrates the selection structure and the stacked structure to connect to the substrate. An upper interconnection line crosses the selection structure. A conductive pad is disposed on the channel structure to electrically connect the upper interconnection line to the channel structure. A bottom surface of the conductive pad is positioned below a top surface of the uppermost selection conductive pattern of the selection conductive patterns.
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公开(公告)号:US20240324206A1
公开(公告)日:2024-09-26
申请号:US18581174
申请日:2024-02-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byungik YOO , Seungbeom KO , Taemok GWON , Changjin SON , Chadong YEO , Seulji LEE , Seungmin LEE
Abstract: A nonvolatile memory device includes a substrate including a memory cell region and a connection region; a mold structure including a plurality of gate electrodes and a plurality of mold insulating layers alternately stacked; a channel structure passing through the mold structure in the memory cell region; a first cell contact passing through the mold structure in the connection region, connected to a first gate electrode and electrically disconnected from a second gate electrode; a plurality of support structures surrounding the first cell contact planarly in the connection region and extending through the mold structure; and a dam structure located between the first cell contact and the second gate electrode in the connection region and apart from the first cell contact with an insulating ring therebetween.
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