SEMICONDUCTOR DEVICES
    2.
    发明公开

    公开(公告)号:US20240172421A1

    公开(公告)日:2024-05-23

    申请号:US18233357

    申请日:2023-08-14

    IPC分类号: H10B12/00

    摘要: A semiconductor device includes an active pattern on a substrate. A bit line structure is on the active pattern. A spacer structure is on a sidewall of the bit line structure. A lower contact plug directly contacts the spacer structure. The spacer structure includes a first spacer covering an upper sidewall of the lower contact plug and a second spacer covering a lower sidewall of the lower contact plug and a portion of a lower surface of the lower contact plug. The lower contact plug includes an extension portion covered by the first and second spacers and a protrusion portion protruding from the first and second spacers. A bottom surface of the protrusion portion is disposed at a level that is lower than or equal to a level of a bottom surface of the second spacer.

    SEMICONDUCTOR DEVICES
    3.
    发明公开

    公开(公告)号:US20230422488A1

    公开(公告)日:2023-12-28

    申请号:US18192329

    申请日:2023-03-29

    IPC分类号: H10B12/00

    摘要: A semiconductor device including a first contact plug structure on a substrate, a lower spacer structure on a sidewall of the first contact plug structure, and a bit line structure on the first contact plug structure and including a conductive structure and an insulation structure stacked in a vertical direction substantially perpendicular to an upper surface of the substrate may be provided. The first contact plug structure may include a conductive pad contacting the upper surface of the substrate, an ohmic contact pattern on the conductive pad, and a conductive filling pattern on the ohmic contact pattern. The conductive filling pattern may include metal, and include a lower portion having a relatively large width and an upper portion having a relatively small width. The lower spacer structure may contact a sidewall of the conductive filling pattern.

    SEMICONDUCTOR DEVICE
    4.
    发明公开

    公开(公告)号:US20230209808A1

    公开(公告)日:2023-06-29

    申请号:US17880723

    申请日:2022-08-04

    IPC分类号: H01L27/108

    CPC分类号: H01L27/10823 H01L27/10814

    摘要: A semiconductor device includes active regions defined by a device isolation region in a substrate; trenches extending in a first direction to intersect the active regions; buried gate structures buried in the trenches, respectively, and having upper surfaces located on a level lower than a level of upper surfaces of the active regions; a buffer structure covering the active regions, the isolation region, and the buried gate structures; bit line structures extending in a second direction intersecting the first direction on the active regions and connected to the active regions; storage node contacts between the bit line structures, penetrating through the buffer structure and in contact with the active regions; and capacitor structures in contact with an upper surface of the storage node contacts.

    SEMICONDUCTOR DEVICES
    5.
    发明公开

    公开(公告)号:US20240306374A1

    公开(公告)日:2024-09-12

    申请号:US18414655

    申请日:2024-01-17

    IPC分类号: H10B12/00

    摘要: A semiconductor device includes an active pattern array including active patterns, an isolation pattern, gate structures, bit line structures, and lower and upper contact plugs. The isolation pattern covers sidewalls of the active patterns. The gate structures extend through upper portions of the active patterns and the isolation pattern in a first direction, and are spaced apart from each other in a second direction. The bit line structures are on central portions of the active patterns and the isolation pattern, extend in the second direction, and are spaced apart from each other in the first direction. The lower contact plugs are disposed on end portions of the active patterns. The upper contact plugs are disposed on the lower contact plugs. The active pattern array includes active pattern rows including the active patterns spaced apart from each other in the first direction.

    INTEGRATED CIRCUIT DEVICES
    6.
    发明公开

    公开(公告)号:US20240032286A1

    公开(公告)日:2024-01-25

    申请号:US18335186

    申请日:2023-06-15

    IPC分类号: H10B12/00 H01L29/423

    摘要: Provided is an integrated circuit device including a substrate that includes an active region defined by a trench isolation, a word line that extends in a first horizontal direction inside the substrate across the active region, a bit line that extends on the word line in a second horizontal direction orthogonal to the first horizontal direction, a direct contact that electrically connects the bit line to the active region, a pad that is on the active region and has a horizontal width that is greater than that of the active region, a buried contact that contacts a sidewall of the pad, and a conductive landing pad that extends on the buried contact in a vertical direction and faces the bit line in the first horizontal direction.

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

    公开(公告)号:US20210351184A1

    公开(公告)日:2021-11-11

    申请号:US17384347

    申请日:2021-07-23

    IPC分类号: H01L27/108 H01L23/528

    摘要: A semiconductor device includes: an active region defined by a device isolation layer formed in a substrate; a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate; a bit line extending in a second direction perpendicular to the first direction on the word line; a first contact connecting the bit line to the active region; a first mask for forming the active region, the first mask being formed on the active region; and a second mask of which a height of a top surface thereof is greater than a height of a top surface of the active region, the second mask covering the word line, wherein the active region has a bar shape that extends to form an acute angle with respect to the first direction.

    SEMICONDUCTOR DEVICES
    8.
    发明公开

    公开(公告)号:US20240315006A1

    公开(公告)日:2024-09-19

    申请号:US18424447

    申请日:2024-01-26

    IPC分类号: H10B12/00

    摘要: A semiconductor device includes an active pattern array including active patterns on a substrate, a first contact structure on a central portion of each active pattern, a bit line structure on the first contact structure, a second contact structure on an end portion of each active pattern, a third contact structure on the second contact structure, a filling pattern between the bit line structure and the third contact structure and including a void, and a capacitor electrically connected to the third contact structure. The active pattern array includes active pattern rows spaced apart from each other in a first direction, and each active pattern row includes the active patterns spaced apart from each other in a second direction. Each active pattern extends in a third direction, and the active patterns in each active pattern row are aligned in the second direction.

    SEMICONDUCTOR DEVICES HAVING BIT LINES
    9.
    发明公开

    公开(公告)号:US20240188284A1

    公开(公告)日:2024-06-06

    申请号:US18371663

    申请日:2023-09-22

    IPC分类号: H10B12/00

    摘要: A semiconductor device includes a gate electrode disposed within a cell region of a substrate, each of bit line structure pairs including a first bit line structure and a second bit line structure, and extension portion pairs disposed within an interface region of the substrate, each extension portion pair including a first extension portion and a second extension portion that are connected to the first bit line structure and the second bit line structure, respectively. The bit line structure pairs are spaced apart from each other by a first distance. In each bit line structure pair, the first bit line structure and the second bit line structure are spaced apart from each other by the first distance. In each extension portion pair, the first extension portion and the second extension portion are spaced apart from each other at a second distance less than the first distance.

    Semiconductor device and manufacturing method of the same

    公开(公告)号:US11616066B2

    公开(公告)日:2023-03-28

    申请号:US17384347

    申请日:2021-07-23

    IPC分类号: H01L27/108 H01L23/528

    摘要: A semiconductor device includes: an active region defined by a device isolation layer formed in a substrate; a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate; a bit line extending in a second direction perpendicular to the first direction on the word line; a first contact connecting the bit line to the active region; a first mask for forming the active region, the first mask being formed on the active region; and a second mask of which a height of a top surface thereof is greater than a height of a top surface of the active region, the second mask covering the word line, wherein the active region has a bar shape that extends to form an acute angle with respect to the first direction.