SEMICONDUCTOR DEVICES
    1.
    发明公开

    公开(公告)号:US20230422488A1

    公开(公告)日:2023-12-28

    申请号:US18192329

    申请日:2023-03-29

    IPC分类号: H10B12/00

    摘要: A semiconductor device including a first contact plug structure on a substrate, a lower spacer structure on a sidewall of the first contact plug structure, and a bit line structure on the first contact plug structure and including a conductive structure and an insulation structure stacked in a vertical direction substantially perpendicular to an upper surface of the substrate may be provided. The first contact plug structure may include a conductive pad contacting the upper surface of the substrate, an ohmic contact pattern on the conductive pad, and a conductive filling pattern on the ohmic contact pattern. The conductive filling pattern may include metal, and include a lower portion having a relatively large width and an upper portion having a relatively small width. The lower spacer structure may contact a sidewall of the conductive filling pattern.

    SEMICONDUCTOR DEVICE
    3.
    发明公开

    公开(公告)号:US20240321735A1

    公开(公告)日:2024-09-26

    申请号:US18601467

    申请日:2024-03-11

    IPC分类号: H01L23/528 H10B12/00

    CPC分类号: H01L23/528 H10B12/00

    摘要: A semiconductor device includes a substrate, a word line extending on the substrate in a first horizontal direction, a bit line extending on the substrate in a second horizontal direction perpendicular to the first horizontal direction, and a spacer structure on one sidewall of the bit line, wherein the bit line includes a lower conductive layer, an intermediate conductive layer, and an upper conductive layer stacked in a vertical direction on the substrate, and the spacer structure includes a depletion stopping layer on one sidewall of the lower conductive layer, extending in the vertical direction and including a material layer having an interfacial trap density less than an interfacial trap density of a silicon nitride layer, and an inner spacer extending in the vertical direction and on one sidewall of the depletion stopping layer.

    SEMICONDUCTOR DEVICES
    4.
    发明公开

    公开(公告)号:US20240315010A1

    公开(公告)日:2024-09-19

    申请号:US18435198

    申请日:2024-02-07

    IPC分类号: H10B12/00

    摘要: Provided is a semiconductor device comprising: an active region defined by an element isolation film in a substrate; a word line extending in a first horizontal direction in the substrate; a bit line extending in a second horizontal direction crossing the first horizontal direction on the substrate; an additional pad disposed on the active region; and a buried contact on the additional pad wherein the buried contact is electrically connected to the active region by the additional pad, wherein the additional pad comprises a first surface that overlaps the word line in a vertical direction, and a second surface that is free of overlap with the word line in the vertical direction, and wherein, the first surface meets the second surface at a cusp.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20240306377A1

    公开(公告)日:2024-09-12

    申请号:US18488229

    申请日:2023-10-17

    IPC分类号: H10B12/00

    摘要: A semiconductor device including a first active pattern and a second active pattern each extending along a first direction and arranged along a second direction intersecting the first direction each of the first and second active patterns including a central part, a first edge part, and a second edge part, a storage node pad on the first edge part of the first active pattern, and a bit-line node contact on the central part of the first active pattern, wherein a top surface of the bit-line node contact is located at a higher level than a top surface of the storage node pad may be provided.

    ELECTRONIC DEVICE COMPRISING AN ANTENNA
    8.
    发明公开

    公开(公告)号:US20230327323A1

    公开(公告)日:2023-10-12

    申请号:US18210975

    申请日:2023-06-16

    IPC分类号: H01Q1/24 H04N23/57 H01Q5/314

    CPC分类号: H01Q1/243 H04N23/57 H01Q5/314

    摘要: An electronic device according to an embodiment may include a camera module, a metal structure, a first antenna adjacent to the camera module, a second antenna spaced from the camera module, a switching module electrically connected to the metal structure, including at least one lumped element, and adjusting an impedance by using the at least one lumped element, and at least one processor. The at least one processor is configured to transmit a signal in a first frequency band by feeding the first antenna and control the switching module such that the switching module has a first impedance corresponding to the first frequency band and electrically connects the metal structure and the ground when the transmission power of the first antenna is equal to or more than the designated value.

    SEMICONDUCTOR MEMORY DEVICE
    9.
    发明公开

    公开(公告)号:US20230320076A1

    公开(公告)日:2023-10-05

    申请号:US17983489

    申请日:2022-11-09

    IPC分类号: H01L27/108 G11C5/06

    CPC分类号: H01L27/10814 G11C5/063

    摘要: A semiconductor memory device includes: a device isolation pattern provided on a substrate to provide a first active portion and a second active portion; a first storage node pad disposed on the first active portion; a second storage node pad disposed on the second active portion; a pad separation pattern disposed between the first and second storage node pads; a word line disposed in the substrate to cross the first and second active portions; a bit line disposed on the pad separation pattern and crossing the word line; a buffer layer disposed on the pad separation pattern; and a mask polysilicon pattern interposed between the buffer layer and the bit line, wherein a side surface of the mask polysilicon pattern is substantially aligned to a side surface of the bit line, and the mask polysilicon pattern is vertically overlapped with the pad separation pattern.