INTEGRATED CIRCUIT CAPABLE OF CONTROLLING IMPEDANCE AND ELECTRONIC DEVICE INCLUDING THE SAME

    公开(公告)号:US20200092983A1

    公开(公告)日:2020-03-19

    申请号:US16564040

    申请日:2019-09-09

    Abstract: Disclosed is an electronic device. The electronic device may include a printed circuit board (PCB) including at least one conducting wire, a first integrated circuit (IC) placed on the printed circuit board and including a transmit pin electrically connected to the at least one conducting wire, and a second IC placed on the printed circuit board and including a receive pin electrically connected to the at least one conducting wire, wherein the first IC is configured to transmit a specified signal having a first voltage through the transmit pin, and change an internal impedance of the first IC based on a reflected signal of the specified signal at a first time point.

    APPARATUS AND METHOD FOR PROCESSING SIGNAL
    2.
    发明申请
    APPARATUS AND METHOD FOR PROCESSING SIGNAL 审中-公开
    装置和处理信号的方法

    公开(公告)号:US20160292121A1

    公开(公告)日:2016-10-06

    申请号:US15082408

    申请日:2016-03-28

    CPC classification number: G06F13/4221 G06F13/4068

    Abstract: A method for use in an electronic device having an interface unit, comprising: selecting a first pin set from a plurality of pin sets that are part of the interface unit, wherein the first pin set is associated with a first communication channel; grounding a second pin set in the plurality of pin sets, wherein the second pin set is associated with a second communication channel; and processing a signal for the first pin set.

    Abstract translation: 一种在具有接口单元的电子设备中使用的方法,包括:从作为所述接口单元的一部分的多个引脚组中选择第一引脚组,其中所述第一引脚组与第一通信信道相关联; 将所述多个销组中的第二引脚接地,其中所述第二引脚组与第二通信信道相关联; 并处理第一针组的信号。

    INTEGRATED CIRCUIT, METHOD, AND ELECTRONIC DEVICE FOR REDUCING EMI OF SIGNAL

    公开(公告)号:US20210036709A1

    公开(公告)日:2021-02-04

    申请号:US16964369

    申请日:2019-01-31

    Abstract: An integrated circuit according to an embodiment of the disclosure may include a plurality of function blocks, a spread spectrum clock (SSC) generator that generates a spread spectrum clock based on a frequency modulation rate value, a clock distribution circuit that distributes the generated spread spectrum clock into the plurality of function blocks, a memory that stores predetermined frequency modulation rate values respectively corresponding to the plurality of function blocks, and a control circuit, and the control circuit may be configured to generate the spread spectrum clock based on a smaller frequency modulation rate value among a first frequency modulation rate value and a second frequency modulation rate value respectively corresponding to a first function block and a second function block, which are operating, from among the plurality of function blocks. Moreover, various embodiment found through the present disclosure are possible.

    ELECTRONIC DEVICE AND OPERATION METHOD THEREFOR

    公开(公告)号:US20230362043A1

    公开(公告)日:2023-11-09

    申请号:US18221717

    申请日:2023-07-13

    CPC classification number: H04L27/0014 H04W72/0453 H04L5/0053 H04L2027/0048

    Abstract: An electronic device includes: An electronic device includes a first communication module and a second communication module configured to perform wireless communication, a spread spectrum clock generator (SSCG), a memory, and a processor. The processor is configured to execute instructions to set a spread spectrum method and a spread ratio of the SSCG, determine whether the electronic device is communicatively coupled to at least one of a first and a second wireless communication, identify a frequency band of a channel of the at least one of the first and the second wireless communication, determine whether at least one of a frequency and multiplication frequencies of the frequency is included by the frequency band of the channel, and maintain the spread spectrum method and the spread ratio causing the SSCG to generate a spread spectrum clock signal based on first spread spectrum method and the spread ratio.

    ELECTRONIC DEVICE AND METHOD FOR DETECTING CONNECTION STATE OF CONNECTION INTERFACE

    公开(公告)号:US20210072326A1

    公开(公告)日:2021-03-11

    申请号:US17012381

    申请日:2020-09-04

    Abstract: An electronic device according to certain embodiments comprises a printed circuit board (PCB); a processor mounted on the PCB; and a connection interface configured to connect the PCB to an off-board electronic component, wherein the processor is configured to: output an inspection signal to the connection interface according to a particular bit pattern at a designated bit rate; identify a voltage level of a reception signal input to the processor, during a designated time, in response to the output of the inspection signal particular bit pattern; and determine a connection state of the connection interface based on the identified voltage level of the reception signal.

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