公开(公告)号：US20150124797A1

公开(公告)日：2015-05-07

申请号：US14335437

申请日：2014-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daniel BABITCH ,  Henry FALK

IPC: H04L7/04 ,  H04W56/00 ,  H04J3/06

CPC classification number: H04L7/041 ,  G06F1/04 ,  G06F13/38 ,  H04J3/0644 ,  H04J3/0697 ,  H04W56/001

Abstract: A system for precise timing and synchronization of events is provided. The system includes a first terminal including one or more first counters and a packetizer configured to create a packetized data stream having one or more event tags. The system also includes a second terminal that includes one or more second counters and a depacketizer. The second counter(s) is/are configured to count clock pulses generated by a first clock of the first terminal at a first clock rate. The depacketizer is configured to receive the packetized data stream and detect the event tag(s). When the at least one event tag is detected, the second terminal calculates a time at which the first terminal created the packetized data stream based on a count value of the second counter(s) and a count value of the first counter(s) of the first terminal.

Abstract translation: 提供了一种精确定时和事件同步的系统。 该系统包括包括一个或多个第一计数器的第一终端和被配置为创建具有一个或多个事件标签的分组化数据流的分组器。 该系统还包括第二终端，其包括一个或多个第二计数器和解封装器。 第二计数器被配置为以第一时钟速率对由第一终端的第一时钟产生的时钟脉冲进行计数。 解包器被配置为接收分组数据流并检测事件标签。 当检测到至少一个事件标签时，第二终端基于第二计数器的计数值和第一计数器的计数值来计算第一终端创建分组化数据流的时间 第一个终端。

公开(公告)号：US20190285755A1

公开(公告)日：2019-09-19

申请号：US16429742

申请日：2019-06-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daniel BABITCH ,  Andrea Y. Chen ,  Chung Lau ,  Bhaskar Nallapureddy

IPC: G01S19/23 ,  G01S19/21

Abstract: An electronic device, a method, and a chipset for receiving global navigation satellite system (GNSS) signals are provided. The electronic device includes a processor configured to: downconvert, by an input/output (I/O) mixer including a first multiplier and a second multiplier, a modulated radio frequency wave to an intermediate frequency, where the modulated radio frequency wave is input to first inputs of the first multiplier and the second multiplier, and where an in-phase signal and a quadrature phase signal based on a square wave are input to second inputs of the first multiplier and the second multiplier, respectively; filter the downconverted modulated radio frequency wave; and convert the filtered downconverted modulated radio frequency wave to a digital signal.

公开(公告)号：US20200292395A1

公开(公告)日：2020-09-17

申请号：US16884620

申请日：2020-05-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daniel BABITCH ,  Kuangmin LI

IPC: G01K7/32 ,  H03L1/02 ,  H03L1/04 ,  G01S19/01

Abstract: A method and system for generating a crystal model for a test product including a crystal oscillator are herein disclosed. The method includes measuring a first temperature of the test product and measuring a first frequency error of the crystal oscillator at a first calibration point during a product testing process, measuring a second temperature of the test product and measuring a second frequency error of the crystal oscillator at a second calibration point during the product testing process, estimating two parameters from the first temperature, first frequency error, second temperature, and second frequency error, and determining a 3rd order polynomial for the crystal model based on the two parameters.

公开(公告)号：US20170024345A1

公开(公告)日：2017-01-26

申请号：US14532582

申请日：2014-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daniel BABITCH ,  Nicolas Vantalon

IPC: G06F13/40 ,  G06F13/42 ,  G01C21/16

CPC classification number: G01C21/165 ,  B81B2201/0235 ,  B81B2201/0242 ,  G01S19/26 ,  G01S19/47 ,  G06F1/3243 ,  G06F13/4022 ,  G06F13/4282 ,  Y02D10/152 ,  Y02D50/20

Abstract: A Micro-Electromechanical System (MEMS) recorder is provided. The MEMS recorder includes a scheduler, a serializer, a multiplexer, a transmit/receive switch, a master clock generator, a deserializer, a comparator array to determine whether to generate a signal to wake up a controller and/or a location module from a sleep mode, and a First-In-First-Out (FIFO) memory to output data to be stored and wake up the controller and/or the location module from the sleep mode if a signal to wake up the controller and/or the location module is received or if the FIFO memory is full, wherein the controller and/or the location module is awakened directly by the MEMS recorder or via the controller.

Abstract translation: 提供了一种微机电系统（MEMS）记录仪。 MEMS记录器包括调度器，串行器，多路复用器，发送/接收开关，主时钟发生器，解串器，比较器阵列，用于确定是否产生将控制器和/或位置模块从 睡眠模式和先入先出（FIFO）存储器，用于输出待存储的数据，并且如果唤醒控制器和/或位置的信号，则将控制器和/或位置模块从睡眠模式唤醒 模块被接收或者如果FIFO存储器已满，其中控制器和/或定位模块被MEMS记录器或经由控制器直接唤醒。

公开(公告)号：US20190331537A1

公开(公告)日：2019-10-31

申请号：US16161985

申请日：2018-10-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daniel BABITCH ,  Kuangmin Li

IPC: G01K7/32 ,  G01S19/01 ,  H03L1/04 ,  H03L1/02

Abstract: A method and system for generating a crystal model for a test product including a crystal oscillator are herein disclosed. The method includes measuring a first temperature of the test product and measuring a first frequency error of the crystal oscillator at a first calibration point during a product testing process, measuring a second temperature of the test product and measuring a second frequency error of the crystal oscillator at a second calibration point during the product testing process, estimating two parameters from the first temperature, first frequency error, second temperature, and second frequency error, and determining a 3rd order polynomial for the crystal model based on the two parameters.

公开(公告)号：US20150124662A1

公开(公告)日：2015-05-07

申请号：US14273015

申请日：2014-05-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daniel BABITCH

IPC: H04L5/14 ,  H04B7/26

CPC classification number: H04L5/1461 ,  H04B7/2643 ,  H04L5/1469

Abstract: Disclosed is a reversible Time Division Duplex (TDD) and/or Time Division Multiple Access (TDMA) radio architecture between Transmission (Tx) and Reception (Rx) functions in a mobile communication system. Accordingly, all of the blocks/components in a Tx/Rx Radio Frequency unit are reversible between Tx and Rx functions. As such, the blocks/components are adapted to bi-directionally process a signal, either in a Tx or Rx direction, based on switching.

Abstract translation: 公开了移动通信系统中的传输（Tx）和接收（Rx）功能之间的可逆时分双工（TDD）和/或时分多址（TDMA）无线电架构。 因此，Tx / Rx射频单元中的所有块/组件在Tx和Rx功能之间是可逆的。 这样，块/分量适于基于切换来双向地处理Tx或Rx方向上的信号。

公开(公告)号：US20170285172A1

公开(公告)日：2017-10-05

申请号：US15207995

申请日：2016-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daniel BABITCH ,  Andrea Y. CHEN ,  Chung LAU ,  Bhaskar NALLAPUREDDY

IPC: G01S19/23 ,  H04B17/21 ,  H04B1/7097

CPC classification number: G01S19/235 ,  G01S19/21

Abstract: A method and apparatus is provided. The apparatus a processor configured to generate a first square wave, generate a second square wave, wherein the first square wave and the second square wave are driven by a reference frequency oscillator, modulate a radio frequency wave with the first square wave, downconvert the modulated radio frequency wave to an intermediate frequency, filter the downconverted modulated radio frequency wave, convert the filtered downconverted modulated radio frequency wave to a digital signal, and integrate the digital signal.

公开(公告)号：US20170242130A1

公开(公告)日：2017-08-24

申请号：US15591510

申请日：2017-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daniel BABITCH ,  Steven A. GRONEMEYER ,  Nicolas VANTALON

IPC: G01S19/23

CPC classification number: G01S19/23 ,  G01S19/235 ,  G01S19/34

Abstract: Methods, systems, and devices for monitoring a Real Time Clock (RTC) oscillator using Digital Signal Processing (DSP), where a resistance/capacitance (RC) oscillator is configured to output a digital pulse signal and a digital RTC Monitor Integrated Circuit (IC) is configured to monitor the RTC oscillator timing signal using the RC oscillator signal. In one aspect, the RTC Monitor IC includes an RTC input configured to receive the RTC oscillator timing signal; an RC input configured to receive the RC oscillator digital pulse signal; and an RTC reset output configured to output an RTC reset signal when a comparison of the RTC and RC oscillator inputs show the RTC oscillator has missed one or more clock cycles. A single wire input/output for both reset and interrupt signals between circuits is also described.

公开(公告)号：US20160156458A1

公开(公告)日：2016-06-02

申请号：US15005298

申请日：2016-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daniel BABITCH ,  Henry FALK

IPC: H04L7/04 ,  H04J3/06

CPC classification number: H04L7/041 ,  G06F1/04 ,  G06F13/38 ,  H04J3/0644 ,  H04J3/0697 ,  H04W56/001

Abstract: A system for precise timing and synchronization of events is provided. The system includes a first terminal including one or more first counters and a packetizer configured to create a packetized data stream having one or more event tags. The system also includes a second terminal that includes one or more second counters and a depacketizer. The second counter(s) is/are configured to count clock pulses generated by a first clock of the first terminal at a first clock rate. The depacketizer is configured to receive the packetized data stream and detect the event tag(s). When the at least one event tag is detected, the second terminal calculates a time at which the first terminal created the packetized data stream based on a count value of the second counter(s) and a count value of the first counter(s) of the first terminal.

Abstract translation: 提供了一种精确定时和事件同步的系统。 该系统包括包括一个或多个第一计数器的第一终端和被配置为创建具有一个或多个事件标签的分组化数据流的分组器。 该系统还包括第二终端，其包括一个或多个第二计数器和解封装器。 第二计数器被配置为以第一时钟速率对由第一终端的第一时钟产生的时钟脉冲进行计数。 解包器被配置为接收分组数据流并检测事件标签。 当检测到至少一个事件标签时，第二终端基于第二计数器的计数值和第一计数器的计数值来计算第一终端创建分组化数据流的时间 第一个终端。