SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE

    公开(公告)号:US20250079382A1

    公开(公告)日:2025-03-06

    申请号:US18807488

    申请日:2024-08-16

    Abstract: Provided is a semiconductor package including a lower package substrate including lower insulating layers, a first semiconductor device mounted on the lower package substrate, a core layer on the lower package substrate to be laterally spaced apart from the first semiconductor device, an encapsulation material surrounding the first semiconductor device and covering an upper portion of the core layer, an upper package substrate disposed on the encapsulation material, the upper package substrate including a first upper redistribution layer and a second upper redistribution layer; wherein a first line width and a first line spacing of a first fine pattern of the first upper redistribution pattern are greater than or equal to a corresponding second line width and a corresponding second line spacing of a second fine pattern of the second upper redistribution pattern, respectively.

    SEMICONDUCTOR PACKAGE
    2.
    发明申请

    公开(公告)号:US20250062252A1

    公开(公告)日:2025-02-20

    申请号:US18742833

    申请日:2024-06-13

    Abstract: A semiconductor package includes a redistribution insulation layer and a connection structure disposed on the redistribution insulation layer in a first direction and including a base layer, a metal pattern, and a cavity. A semiconductor chip is disposed on the redistribution insulation layer in the first direction. The semiconductor chip is spaced apart from the connection structure by a molding layer. The semiconductor chip and the molding layer are disposed in the cavity. The metal pattern is disposed on the redistribution insulation layer, at least partially between the base layer and the molding layer. The metal pattern includes a first metal pattern extending, in a second direction crossing the first direction, from an inner surface of the connection structure into the base layer and separating at least a portion of the base layer from at least a portion of the redistribution insulation layer.

    Semiconductor device manufacturing method and extreme ultraviolet mask manufacturing method

    公开(公告)号:US12092961B2

    公开(公告)日:2024-09-17

    申请号:US17537700

    申请日:2021-11-30

    CPC classification number: G03F7/70441 G03F1/24 G03F7/70033 G06F30/30

    Abstract: Provided is an extreme ultraviolet (EUV) mask manufacturing method of forming an optimum pattern on a wafer by efficiently reflecting a mask topography effect or a coupling effect between edges of a pattern and improving the accuracy of an EUV mask image. The EUV mask manufacturing method includes performing an optical proximity correction (OPC) method for obtaining EUV mask design data, transferring the EUV mask design data as mask tape-out (MTO) design data, preparing mask data based on the MTO design data, and completing an EUV mask by exposing an EUV mask substrate based on the mask data, wherein the performing of the OPC method applies a coupling filter to both a first case in which angles of an edge pair satisfy |θ1−θ2|=0, and a second case in which angles of an edge pair satisfy 0

    Optical proximity correction method and method of manufacturing extreme ultraviolet mask by using the same

    公开(公告)号:US12181792B2

    公开(公告)日:2024-12-31

    申请号:US17651627

    申请日:2022-02-18

    Abstract: An optical proximity correction (OPC) method of effectively imitating a mask topography effect for a mask having a curvilinear pattern includes generating a library for edge filters of a near field by using an electromagnetic field simulation; generating an any-angle edge filter by using the library; for a mask having a curvilinear pattern, generating a first mask image by using thin mask approximation; determining whether the curvilinear pattern satisfies a reference; when the curvilinear pattern satisfies the reference, performing skewed Manhattanization on the curvilinear pattern and then generating a second mask image by applying the any-angle edge filter to edges of the curvilinear pattern.

    OPTICAL PROXIMITY CORRECTION METHOD AND METHOD OF MANUFACTURING EXTREME ULTRAVIOLET MASK BY USING THE SAME

    公开(公告)号:US20220413377A1

    公开(公告)日:2022-12-29

    申请号:US17651627

    申请日:2022-02-18

    Abstract: An optical proximity correction (OPC) method of effectively imitating a mask topography effect for a mask having a curvilinear pattern includes generating a library for edge filters of a near field by using an electromagnetic field simulation; generating an any-angle edge filter by using the library; for a mask having a curvilinear pattern, generating a first mask image by using thin mask approximation; determining whether the curvilinear pattern satisfies a reference; when the curvilinear pattern satisfies the reference, performing skewed Manhattanization on the curvilinear pattern and then generating a second mask image by applying the any-angle edge filter to edges of the curvilinear pattern.

    SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND EXTREME ULTRAVIOLET MASK MANUFACTURING METHOD

    公开(公告)号:US20220326622A1

    公开(公告)日:2022-10-13

    申请号:US17537700

    申请日:2021-11-30

    Abstract: Provided is an extreme ultraviolet (EUV) mask manufacturing method of forming an optimum pattern on a wafer by efficiently reflecting a mask topography effect or a coupling effect between edges of a pattern and improving the accuracy of an EUV mask image. The EUV mask manufacturing method includes performing an optical proximity correction (OPC) method for obtaining EUV mask design data, transferring the EUV mask design data as mask tape-out (MTO) design data, preparing mask data based on the MTO design data, and completing an EUV mask by exposing an EUV mask substrate based on the mask data, wherein the performing of the OPC method applies a coupling filter to both a first case in which angles of an edge pair satisfy |θ1−θ2|=0, and a second case in which angles of an edge pair satisfy 0

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