公开(公告)号：US20150270221A1

公开(公告)日：2015-09-24

申请号：US14729264

申请日：2015-06-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Ho AN ,  Byung Lyul PARK ,  Soyoung LEE ,  Gilheyun CHOI

IPC: H01L23/538 ,  H01L23/00

CPC classification number: H01L23/5384 ,  H01L21/76877 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/09 ,  H01L2224/0401 ,  H01L2224/08146 ,  H01L2224/13 ,  H01L2224/16145 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00

Abstract: Semiconductor devices, and methods of fabricating a semiconductor device, include forming a via hole through a first surface of a substrate, the via hole being spaced apart from a second surface facing the first surface, forming a first conductive pattern in the via hole, forming an insulating pad layer on the first surface of the substrate, the insulating pad having an opening exposing the first conductive pattern, performing a thermal treatment on the first conductive pattern to form a protrusion protruding from a top surface of the first conductive pattern toward the opening, and then, forming a second conductive pattern in the opening.

Abstract translation: 半导体器件以及制造半导体器件的方法包括：通过基板的第一表面形成通孔，所述通孔与面向第一表面的第二表面间隔开，在通孔中形成第一导电图案，形成 在所述基板的第一表面上的绝缘垫层，所述绝缘垫具有暴露所述第一导电图案的开口，对所述第一导电图案进行热处理，以形成从所述第一导电图案的顶表面朝向所述开口突出的突起 ，然后在开口中形成第二导电图案。

公开(公告)号：US20140162449A1

公开(公告)日：2014-06-12

申请号：US14094963

申请日：2013-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Ho AN ,  Byung-Lyul PARK ,  Soyoung LEE ,  Gilheyun CHOI

IPC: H01L21/768

CPC classification number: H01L23/5384 ,  H01L21/76877 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/09 ,  H01L2224/0401 ,  H01L2224/08146 ,  H01L2224/13 ,  H01L2224/16145 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00

Abstract: Semiconductor devices, and methods of fabricating a semiconductor device, include forming a via hole through a first surface of a substrate, the via hole being spaced apart from a second surface facing the first surface, forming a first conductive pattern in the via hole, forming an insulating pad layer on the first surface of the substrate, the insulating pad having an opening exposing the first conductive pattern, performing a thermal treatment on the first conductive pattern to form a protrusion protruding from a top surface of the first conductive pattern toward the opening, and then, forming a second conductive pattern in the opening.

Abstract translation: 半导体器件以及制造半导体器件的方法包括：通过基板的第一表面形成通孔，所述通孔与面向第一表面的第二表面间隔开，在通孔中形成第一导电图案，形成 在所述基板的第一表面上的绝缘垫层，所述绝缘垫具有暴露所述第一导电图案的开口，对所述第一导电图案进行热处理，以形成从所述第一导电图案的顶表面朝向所述开口突出的突起 ，然后在开口中形成第二导电图案。

公开(公告)号：US20140225251A1

公开(公告)日：2014-08-14

申请号：US14134043

申请日：2013-12-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jang-Hee LEE ,  Jongmin BAEK ,  Kyu-Hee HAN ,  Gilheyun CHOI ,  Jongwon HONG

IPC: H01L23/28 ,  H01L23/48

CPC classification number: H01L23/4821 ,  H01L21/764 ,  H01L21/7682 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/28 ,  H01L23/48 ,  H01L23/5222 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/0001

Abstract: Semiconductor devices, and methods of fabricating the same, include first conductive lines on a substrate, and a first molding layer covering the first conductive lines. The first conductive lines have air gaps between adjacent first conductive lines. Sidewalls of the first conductive lines and a bottom surface of the first molding layer collectively define a first gap region of each of the air gaps. The sidewalls of the first conductive lines and a top surface of the first molding layer collectively define a second air gap region of each of the air gaps.

Abstract translation: 半导体器件及其制造方法包括在基板上的第一导线和覆盖第一导线的第一成型层。 第一导线在相邻的第一导线之间具有气隙。 第一导电线的侧壁和第一模制层的底表面共同限定每个气隙的第一间隙区域。 第一导电线的侧壁和第一模制层的顶表面共同限定每个气隙的第二气隙区域。