Interference signal control information acquisition method and apparatus for use in wireless communication system
    1.
    发明授权
    Interference signal control information acquisition method and apparatus for use in wireless communication system 有权
    用于无线通信系统的干扰信号控制信息采集方法及装置

    公开(公告)号:US09503215B2

    公开(公告)日:2016-11-22

    申请号:US14467362

    申请日:2014-08-25

    Abstract: An interference signal control information acquisition method and apparatus for use in the wireless communication system is provided. The interference signal information detection method of a terminal for use in a wireless communication system includes acquiring a first control information part and a second control information part of other users from a received signal, generating a first control information candidate identical in bit length with the first control information part, blindly decoding first control information based on the first control information candidate, and detecting and removing interference signals of the other users from the received signal based on the blindly decoded first control information.

    Abstract translation: 提供了一种在无线通信系统中使用的干扰信号控制信息获取方法和装置。 用于无线通信系统的终端的干扰信号信息检测方法包括从接收信号中获取其他用户的第一控制信息部分和第二控制信息部分,生成与第一 控制信息部分,基于第一控制信息候选盲目地解码第一控制信息,并且基于盲解码的第一控制信息,从接收到的信号中检测和去除其他用户的干扰信号。

    STACK SEMICONDUCTOR PACKAGE
    2.
    发明公开

    公开(公告)号:US20240063155A1

    公开(公告)日:2024-02-22

    申请号:US18296500

    申请日:2023-04-06

    Abstract: A stack semiconductor package including a base chip, at least two semiconductor chips stacked on the base chip, and a sealing material sealing the at least two semiconductor chips on the base chip may be provided. The at least two semiconductor chips may include an uppermost semiconductor chip and at least one under the uppermost semiconductor chip, the first semiconductor chip includes through electrodes at a central portion thereof along a first direction, the through electrodes arranged along a second direction perpendicular to the first direction, upper dummy pads on outer portions of a back side of the first semiconductor chip, the outer portions being a non-active surface of the first semiconductor chip and being at both sides of the central portion in the first direction, and a dummy pattern connecting the upper dummy pads with each other on the back side.

    Convolutional decoder and method of decoding convolutional codes

    公开(公告)号:US10382061B2

    公开(公告)日:2019-08-13

    申请号:US16057719

    申请日:2018-08-07

    Abstract: A convolutional decoder includes a first storage, a second storage, a branch metric processor to determine branch metrics for transitions of states from a start step to a last step according to input bit streams, an ACS processor to select maximum likelihood path metrics to determine a survival path according to the branch metrics and to update states of the start step to the first storage and the second storage alternately based on the selection of the maximum likelihood path metrics, and a trace back logic to selectively trace back the survival path based on the states of the start step stored in a selected storage among the first storage and the second storage.

    Convolutional decoder and method of decoding convolutional codes

    公开(公告)号:US10069517B2

    公开(公告)日:2018-09-04

    申请号:US15340992

    申请日:2016-11-02

    Abstract: A convolutional decoder includes a first storage, a second storage, a branch metric processor to determine branch metrics for transitions of states from a start step to a last step according to input bit streams, an ACS processor to select maximum likelihood path metrics to determine a survival path according to the branch metrics and to update states of the start step to the first storage and the second storage alternately based on the selection of the maximum likelihood path metrics, and a trace back logic to selectively trace back the survival path based on the states of the start step stored in a selected storage among the first storage and the second storage.

    Semiconductor package including semiconductor chips

    公开(公告)号:US11569193B2

    公开(公告)日:2023-01-31

    申请号:US17223614

    申请日:2021-04-06

    Abstract: A semiconductor package may include a semiconductor chip on a package substrate. The semiconductor package may include a plurality of conductive connections connecting the semiconductor chip to the package substrate may be disposed, a plurality of towers which are apart from one another and each include a plurality of memory chips may be disposed, wherein a lowermost memory chip of each of the plurality of towers overlaps the semiconductor chip from a top-down view. The semiconductor package further includes a plurality of adhesive layers be attached between the lowermost memory chip of each of the plurality of towers and the semiconductor chip.

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