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公开(公告)号：US11424678B2
公开(公告)日：2022-08-23
申请号：US16939272
申请日：2020-07-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyunseok Nam
Abstract: A frequency limit circuit includes a frequency-voltage converter, a compensation voltage generator and a compensator. The frequency-voltage converter generates a conversion voltage proportional to an operation frequency of the DC-DC converter based on a pulse-frequency modulation (PFM) voltage control signal indicating the operation frequency. The compensation voltage generator generates a compensation voltage based on a difference between the conversion voltage and a frequency limit voltage. The compensator adjusts a compensation current at an output node of the DC-DC converter based on the compensation voltage to restrict the operation frequency. The operation frequency of the DC-DC converter may be restricted efficiently by adjusting the compensation current through the negative feedback operation.
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公开(公告)号：US11194359B2
公开(公告)日：2021-12-07
申请号：US16815503
申请日：2020-03-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyunseok Nam
Abstract: A clock monitoring circuit and an integrated circuit including the clock monitoring circuit, the clock monitoring circuit including a first duty ratio detector that detects a variation of a duty ratio of a clock signal based on a first upper limit voltage and a first lower limit voltage, a second duty ratio detector that detects a variation of a duty ratio of a monitoring clock signal based on a second upper limit voltage and a second lower limit voltage, and a first frequency detector that detects a frequency variation of the clock signal using the second upper limit voltage and the second lower limit voltage.
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公开(公告)号：US10819327B2
公开(公告)日：2020-10-27
申请号：US16506311
申请日：2019-07-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyunseok Nam
Abstract: A duty timing detector includes a saw-tooth voltage generator that outputs a saw-tooth voltage in synchronization with a toggle signal repeatedly transitioning between a high level and a low level. A sample block obtains a level of the saw-tooth voltage in synchronization with the toggle signal and outputs the obtained level as a first sample voltage. A hold block stores the first sample voltage in synchronization with the toggle signal and outputs the stored first sample voltage as a second sample voltage. A voltage divider divides the second sample voltage to output a division voltage. A comparator compares the saw-tooth voltage and the division voltage to detect a target timing in each duty of the toggle signal.
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公开(公告)号：US12158497B2
公开(公告)日：2024-12-03
申请号：US17959545
申请日：2022-10-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyunseok Nam
IPC: G01R31/317 , H03K4/06 , H03K19/20
Abstract: An electronic circuit includes a ramp signal generator, an oscillator, a monitoring circuit and a logic controller. The ramp signal generator generates a ramp signal. The oscillator generates a clock signal. The monitoring circuit operates in an operation mode selected from a first mode of monitoring an external output voltage and a second mode of performing an analog built-in self-test (ABIST), and generates a comparator output. The logic controller controls the monitoring circuit to operate in the operation mode. When the monitoring circuit operates in the second mode, the logic controller counts the clock signal, controls the monitoring circuit to perform the ABIST based on the ramp signal, and generates an ABIST output indicating whether the monitoring circuit operates normally based on a value of the counting and the comparator output.
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公开(公告)号：US11804773B2
公开(公告)日：2023-10-31
申请号：US17519517
申请日：2021-11-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyunseok Nam
Abstract: A dead time controller includes a phase detector, a filter circuit and an amplifying circuit. The phase detector generates a detection signal by detecting a phase difference between a first driving control signal applied to a first power transistor and a second driving control signal applied to a second power transistor, the detection signal being associated with a dead time corresponding to an overlapped deactivation interval between the first and second driving control signals. The filter circuit generates a DC voltage signal by filtering and averaging the detection signal based on a pulse-width modulation (PWM) signal. The PWM signal is generated by performing a PWM on an output voltage provided at an output node coupled to a second terminal of the inductor. The amplifying circuit generates an amplified voltage signal having a voltage level proportional to the dead time by amplifying the DC voltage signal.
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Patent Agency Ranking
公开(公告)号：US11698406B2
公开(公告)日：2023-07-11
申请号：US16925389
申请日：2020-07-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyunseok Nam , Sangyoung Lee
IPC: G01R31/28 , G01R31/3167
CPC classification number: G01R31/2829 , G01R31/3167 , G01R31/2856
Abstract: A test circuit for testing a monitoring circuit includes: a ramp generator configured to generate a ramp signal in response to an activated first control signal; a counter configured to count pulses of a clock signal in response to the activated first control signal; at least one register configured to store an output value of the counter based on a change in at least one output signal generated by the monitoring circuit in response to the ramp signal in a test mode; and a controller configured to generate the first control signal and verify the monitoring circuit based on a ratio of a value stored in the at least one register to a duration during which the first control signal is activated.
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公开(公告)号：US11522455B2
公开(公告)日：2022-12-06
申请号：US17165257
申请日：2021-02-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyunseok Nam
Abstract: A power converter for detecting oscillation of an output voltage including a switching regulator configured to perform switching so that an inductor is alternatively connected to or isolated from an external power voltage and generate the output voltage by a current that flows through the inductor and an oscillation detector configured to detect oscillation that occurs in the output voltage and output an oscillation detection signal by determining whether the oscillation belongs to an oscillation frequency detection range to be detected by the oscillation detector may be provided.
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公开(公告)号：US10892683B2
公开(公告)日：2021-01-12
申请号：US16506232
申请日：2019-07-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyunseok Nam
Abstract: An electronic circuit includes an inductive element outputting an inductor current, a first transistor, a second transistor, and a load current estimator circuit. The first transistor is connected between a first end of the inductive element and a reference terminal. The second transistor is connected between the first end of the inductive element and an output terminal for outputting a load current. The load current estimator circuit receives a first voltage which is sensed between both ends of the second transistor in response to the inductor current while the first transistor is turned off and the second transistor is turned on, and outputs a second voltage based on a level of the first voltage at a reference time point within a time interval when the second transistor is turned on. The second voltage is associated with an intensity of the load current.
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公开(公告)号：US12276691B2
公开(公告)日：2025-04-15
申请号：US18094860
申请日：2023-01-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyunseok Nam , Yus Ko , Sangho Kim , Jaehyuk Yang
IPC: G01R31/28
Abstract: A device includes a function circuit that operates based on power provided by a first positive supply voltage and a first negative supply voltage, a monitoring circuit that operates based on power provided by a second positive supply voltage and a second negative supply voltage and that generates a first monitor signal based on monitoring an operation of the function circuit, and an output circuit that generates a second monitor signal based on monitoring the first positive supply voltage, generates a third monitor signal based on monitoring the second positive supply voltage, and generates an output signal that is output through one or more output pins, based on the first monitor signal, the second monitor signal, and the third monitor signal.
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公开(公告)号：US20240402785A1
公开(公告)日：2024-12-05
申请号：US18510498
申请日：2023-11-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyunseok Nam , Hyunwook Song
IPC: G06F1/3203 , H02H5/04 , H02H7/12 , H02M3/156
Abstract: An example electronic device includes a power management circuit (PMIC), a plurality of voltage devices, and a time division sensing circuit. The PMIC includes a plurality of direct current (DC)-DC converters that generate a plurality of power supply voltages, respectively, based on a battery voltage. The voltage devices are distributed in the PMIC, and generate a plurality of temperature voltages that are inversely proportional to an ambient temperature. The time division sensing circuit converts the temperature voltages to sensed voltages, generates a decision signal indicating that at least one of the plurality of sensed voltages is equal to or smaller than a reference voltage based on a result of comparing each of the sensed voltages with the reference voltage by a time division scheme during a sensing period, and provides the decision signal to the PMIC. The PMIC performs a thermal shutdown on at least one of the DC-DC converters.
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