公开(公告)号：US20240321961A1

公开(公告)日：2024-09-26

申请号：US18613338

申请日：2024-03-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongsu Kim ,  Myunggil Kang ,  Dongwon Kim ,  Beomjin Park ,  Inhyun Song ,  Hyumin Yoo ,  Yujin Jeon

IPC: H01L29/06 ,  H01L27/092 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: An integrated circuit device includes, a first nano-sheet stack including a plurality of nano-sheets arranged on a fin-type active region extending in a first horizontal direction, a gate line extending in a second horizontal direction on the fin-type active region, a vertical structure contacting the plurality of nano-sheets, and a first gate dielectric layer disposed between the gate line and the plurality of nano-sheets and between the gate line and the vertical structure, wherein the gate line includes a first sub-gate portion disposed under each of the plurality of nano-sheets, the first gate dielectric layer includes a first portion disposed between the gate line and the plurality of nano-sheets, and a second portion disposed between the first sub-gate portion and the vertical structure, and a thickness of the second portion in the second horizontal direction is greater than a thickness of the first portion in the vertical direction.

公开(公告)号：US20230139314A1

公开(公告)日：2023-05-04

申请号：US17814876

申请日：2022-07-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inhyun Song ,  Ohseong Kwon ,  Junggil Yang ,  Jooho Jung

IPC: H01L29/06 ,  H01L29/786 ,  H01L29/775 ,  H01L29/423 ,  H01L27/088

Abstract: A semiconductor device includes: a substrate including an active region extending in a first direction; a gate electrode extending in a second direction and intersecting the active region, the gate electrode including first electrode layer(s) and a second electrode layer;, channel layers spaced apart from each other in a third direction and at least partially surrounded by the gate electrode; source/drain regions, with at least one source/drain region on each side of the gate electrode and electrically connected to the channel layers; and air gap regions in the second electrode layer between the channel layers and between a lowermost channel layer and the active region in the third direction. The first electrode layer(s) or the second electrode layer has a first thickness between adjacent ones of the channel layers in the third direction, and has a second thickness greater than the first thickness on side surfaces of the channel layers.

公开(公告)号：US12027523B2

公开(公告)日：2024-07-02

申请号：US17468139

申请日：2021-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inhyun Song ,  Junggil Yang ,  Minju Kim

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/423 ,  H01L29/49 ,  H01L21/28 ,  H01L29/786

CPC classification number: H01L27/092 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/82385 ,  H01L27/0924 ,  H01L29/42392 ,  H01L29/4908 ,  H01L21/28088 ,  H01L29/78696

Abstract: Disclosed are semiconductor devices and their fabricating methods. The semiconductor device comprises first and second active patterns, a first channel pattern including first semiconductor patterns, a second channel pattern including second semiconductor patterns, a gate electrode on the first and second channel patterns, and a gate dielectric layer between the gate electrode and the first and second channel patterns. The gate electrode includes a first inner gate electrode between the first semiconductor patterns, a second inner gate electrode between the second semiconductor patterns, and an outer gate electrode outside the first and second semiconductor patterns. The first and second inner gate electrodes are on bottom surfaces of uppermost first and second semiconductor patterns. The outer gate electrode is on top surfaces and sidewalls of the uppermost first and second semiconductor patterns. The first and second inner gate electrodes have different work functions.

公开(公告)号：US11264482B2

公开(公告)日：2022-03-01

申请号：US16572681

申请日：2019-09-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghyun Kim ,  Inhyun Song ,  Yeongmin Jeon ,  Sejin Park ,  Juyun Park ,  Jonghoon Baek ,  Taeyeon Shin ,  Sooyeon Jeong

IPC: H01L29/66 ,  H01L21/8234 ,  H01L29/78 ,  H01L27/088

Abstract: A semiconductor device may include: a dummy gate structure including a first gate pattern in which dummy gate lines extending in one direction are connected to each other on a substrate, and a second gate pattern in which dummy gate lines extending in the one direction are connected to each other on the same line with the first gate pattern; and a third gate pattern extending in parallel with the dummy gate structure on one side of the dummy gate structure.