公开(公告)号：US11594604B2

公开(公告)日：2023-02-28

申请号：US17388269

申请日：2021-07-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Namgyu Cho ,  Minwoo Song ,  Ohseong Kwon ,  Wandon Kim ,  Hyeokjun Son ,  Jinkyu Jang

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/786 ,  H01L29/49 ,  H01L29/423 ,  H01L29/06 ,  H01L29/775 ,  H01L29/66

Abstract: A semiconductor device includes: an active fin disposed on a substrate; a gate structure overlapping the active fin; source/drain regions disposed on both sides of the gate structure and on the active fin; and contact structures respectively connected to the source/drain regions, wherein the gate structure includes: a pair of gate spacers spaced apart from each other to provide a trench; a first gate electrode disposed in the trench and extending along an upper surface and a lateral surface of the active fin; a second gate electrode disposed on the first gate electrode in the trench, wherein the first gate electrode is not disposed between the second gate electrode and the pair of gate spacers; and a gate insulating film disposed between the pair of gate spacers and interposed between the first gate electrode and the active fin.

公开(公告)号：US20230139314A1

公开(公告)日：2023-05-04

申请号：US17814876

申请日：2022-07-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inhyun Song ,  Ohseong Kwon ,  Junggil Yang ,  Jooho Jung

IPC: H01L29/06 ,  H01L29/786 ,  H01L29/775 ,  H01L29/423 ,  H01L27/088

Abstract: A semiconductor device includes: a substrate including an active region extending in a first direction; a gate electrode extending in a second direction and intersecting the active region, the gate electrode including first electrode layer(s) and a second electrode layer;, channel layers spaced apart from each other in a third direction and at least partially surrounded by the gate electrode; source/drain regions, with at least one source/drain region on each side of the gate electrode and electrically connected to the channel layers; and air gap regions in the second electrode layer between the channel layers and between a lowermost channel layer and the active region in the third direction. The first electrode layer(s) or the second electrode layer has a first thickness between adjacent ones of the channel layers in the third direction, and has a second thickness greater than the first thickness on side surfaces of the channel layers.

公开(公告)号：US09093460B2

公开(公告)日：2015-07-28

申请号：US14022865

申请日：2013-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Beomseok Kim ,  Ohseong Kwon ,  Wandon Kim ,  Jaewan Chang ,  Kyuho Cho

IPC: H01L49/02 ,  H01L27/108

CPC classification number: H01L28/60 ,  H01L27/10852 ,  H01L27/10894 ,  H01L28/75 ,  H01L28/91

Abstract: The present inventive concept provides semiconductor devices that may include a capacitor including a lower electrode, a dielectric layer, and an upper electrode which are sequentially stacked. An electrode-protecting layer may be provided on the capacitor. The upper electrode may include a conductive metal oxide and the electrode-protecting layer may include a sacrificial reaction layer including a metal-hydrogen compound.

Abstract translation: 本发明构思提供半导体器件，其可以包括依次层叠的包括下电极，电介质层和上电极的电容器。 可以在电容器上设置电极保护层。 上电极可以包括导电金属氧化物，并且电极保护层可以包括包含金属 - 氢化合物的牺牲反应层。

公开(公告)号：US11955523B2

公开(公告)日：2024-04-09

申请号：US18113116

申请日：2023-02-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Namgyu Cho ,  Minwoo Song ,  Ohseong Kwon ,  Wandon Kim ,  Hyeokjun Son ,  Jinkyu Jang

IPC: H01L29/417 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L29/41791 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823462 ,  H01L21/823468 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/4236 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/7854 ,  H01L29/7855 ,  H01L29/78696 ,  H01L29/4966 ,  H01L29/7848

Abstract: A semiconductor device includes: an active fin disposed on a substrate; a gate structure overlapping the active fin; source/drain regions disposed on both sides of the gate structure and on the active fin; and contact structures respectively connected to the source/drain regions, wherein the gate structure includes: a pair of gate spacers spaced apart from each other to provide a trench; a first gate electrode disposed in the trench and extending along an upper surface and a lateral surface of the active fin; a second gate electrode disposed on the first gate electrode in the trench, wherein the first gate electrode is not disposed between the second gate electrode and the pair of gate spacers; and a gate insulating film disposed between the pair of gate spacers and interposed between the first gate electrode and the active fin.

公开(公告)号：US20230402523A1

公开(公告)日：2023-12-14

申请号：US18103897

申请日：2023-01-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaeyeol SONG ,  Ohseong Kwon ,  Suyoung Bae ,  Sangyong Kim

IPC: H01L29/423 ,  H01L29/775 ,  H01L29/06 ,  H01L27/088

CPC classification number: H01L29/42392 ,  H01L29/775 ,  H01L29/0673 ,  H01L27/088

Abstract: A semiconductor device includes first and second active patterns respectively provided on a first and second PMOSFET regions of a substrate, a first channel pattern on the first active pattern, the first channel pattern including first semiconductor patterns stacked and spaced apart from each other, a second channel pattern on the second active pattern, the second channel pattern including second semiconductor patterns stacked and spaced apart from each other, a first gate electrode on the first channel pattern, and a second gate electrode on the second channel pattern. A first concentration of aluminum (Al) or silicon (Si) in an inner gate electrode of the first gate electrode is different from a second concentration of aluminum (Al) or silicon (Si) in an inner gate electrode of the second gate electrode.

公开(公告)号：US20140103491A1

公开(公告)日：2014-04-17

申请号：US14022865

申请日：2013-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Beomseok Kim ,  Ohseong Kwon ,  Wandon Kim ,  Jaewan Chang ,  Kyuho Cho

IPC: H01L49/02

CPC classification number: H01L28/60 ,  H01L27/10852 ,  H01L27/10894 ,  H01L28/75 ,  H01L28/91

Abstract: The present inventive concept provides semiconductor devices that may include a capacitor including a lower electrode, a dielectric layer, and an upper electrode which are sequentially stacked. An electrode-protecting layer may be provided on the capacitor. The upper electrode may include a conductive metal oxide and the electrode-protecting layer may include a sacrificial reaction layer including a metal-hydrogen compound.

Abstract translation: 本发明构思提供半导体器件，其可以包括依次层叠的包括下电极，电介质层和上电极的电容器。 可以在电容器上设置电极保护层。 上电极可以包括导电金属氧化物，并且电极保护层可以包括包含金属 - 氢化合物的牺牲反应层。

公开(公告)号：US20250063804A1

公开(公告)日：2025-02-20

申请号：US18668920

申请日：2024-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Suyoung BAE ,  Ohseong Kwon ,  Jaeyeol Song ,  Jeonghyuk Yim

IPC: H01L21/8238 ,  H01L21/308 ,  H01L27/092

Abstract: Provided is a semiconductor device and method of manufacturing same, the method including: preparing a substrate including first and second regions; forming a first and second channel patterns in the first and second regions, wherein the first and second channel patterns each include a plurality of semiconductor patterns vertically stacked on the substrate, an inner region, and an outer region; forming a high-k dielectric layer covering the first channel pattern and the second channel pattern; forming a first protective mask on the high-k dielectric layer in the first region and the second region; removing the first protective mask from the first outer region and the second outer region; and forming an additional mask layer surrounding the first channel pattern and the second channel pattern, wherein the additional mask layer does not have etch selectivity with the first protective mask.

公开(公告)号：US20220130972A1

公开(公告)日：2022-04-28

申请号：US17388269

申请日：2021-07-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Namgyu Cho ,  Minwoo Song ,  Ohseong Kwon ,  Wandon Kim ,  Hyeokjun Son ,  Jinkyu Jang

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/78

Abstract: A semiconductor device includes: an active fin disposed on a substrate; a gate structure overlapping the active fin; source/drain regions disposed on both sides of the gate structure and on the active fin; and contact structures respectively connected to the source/drain regions, wherein the gate structure includes: a pair of gate spacers spaced apart from each other to provide a trench; a first gate electrode disposed in the trench and extending along an upper surface and a lateral surface of the active fin; a second gate electrode disposed on the first gate electrode in the trench, wherein the first gate electrode is not disposed between the second gate electrode and the pair of gate spacers; and a gate insulating film disposed between the pair of gate spacers and interposed between the first gate electrode and the active fin.