公开(公告)号：US20200334407A1

公开(公告)日：2020-10-22

申请号：US16915369

申请日：2020-06-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JIN-TAE KIM ,  JUNG-HO DO ,  TAE-JOONG SONG ,  DOO-HEE CHO ,  SEUNG-YOUNG LEE

IPC: G06F30/394 ,  G06F30/392

Abstract: A method of designing an integrated circuit includes receiving input data defining the integrated circuit, receiving information from a standard cell library including a plurality of standard cells, receiving information from a modified cell library including at least one modified cell having a same function as a corresponding standard cell among the plurality of standard cells and having a higher routability than the corresponding standard cell and generating output data by performing placement and routing in response to the input data, the information from the standard cell library and the information from the modified cell library.

公开(公告)号：US20180096092A1

公开(公告)日：2018-04-05

申请号：US15585548

申请日：2017-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JIN-TAE KIM ,  Jung-Ho Do ,  Tae-Joong Song ,  Doo-Hee Cho ,  Seung-Young Lee

IPC: G06F17/50

Abstract: A method of designing an integrated circuit includes receiving input data defining the integrated circuit, receiving information from a standard cell library including a plurality of standard cells, receiving information from a modified cell library including at least one modified cell having a same function as a corresponding standard cell among the plurality of standard cells and having a higher routability than the corresponding standard cell and generating output data by performing placement and routing in response to the input data, the information from the standard cell library and the information from the modified cell library.

公开(公告)号：US20200050728A1

公开(公告)日：2020-02-13

申请号：US16378751

申请日：2019-04-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： JIN-TAE KIM ,  Sung-We Cho ,  Tae-Joong Song ,  Seung-Young Lee ,  Jin-Young Lim

IPC: G06F17/50 ,  H01L27/02

Abstract: An integrated circuit may include a first standard cell including first and second active regions extending in a first horizontal direction and a first gate line extending in a second horizontal direction orthogonal to the first horizontal direction; and a second standard cell including third and fourth active regions extending in the first horizontal direction and a second gate line aligned in parallel to the first gate in the second horizontal direction and being adjacent to the first standard cell. A distance between the second active region of the first standard cell and the third active region of the second standard cell may be greater than a distance between the first and second active regions of the first standard cell, and may be greater than a distance between the third and fourth active regions of the second standard cell.

公开(公告)号：US20160125117A1

公开(公告)日：2016-05-05

申请号：US14926128

申请日：2015-10-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JIN-TAE KIM ,  HA-YOUNG KIM ,  JAE-WOO SEO

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5081

Abstract: A method of designing a layout of an integrated circuit (IC), which is implemented by a computer system or a processor, includes receiving input layout data, and performing a design rule check with regard to a plurality of patterns. The method includes, merging, from among a first pattern and a second pattern against the design rule, the first pattern with a third pattern connected to a same net as the first pattern, and generating output layout data.

Abstract translation: 设计由计算机系统或处理器实现的集成电路（IC）的布局的方法包括接收输入布局数据，以及针对多个图案执行设计规则检查。 该方法包括：从第一图案和第二图案中按照设计规则合并具有连接到与第一图案相同的网的第三图案的第一图案，以及生成输出布局数据。