公开(公告)号：US20190123272A1

公开(公告)日：2019-04-25

申请号：US16014871

申请日：2018-06-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-Hyun JEONG ,  ILMOK PARK ,  Si-Ho SONG

IPC: H01L45/00 ,  G11C13/00

Abstract: Disclosed are a variable resistance memory device and a method of manufacturing the same. The device comprises a first conductive line extending in a first direction, a second conductive line extending in a second direction intersecting the first direction, a memory cell at an intersection between the first conductive line and the second conductive line, a first electrode between the first conductive line and the memory cell, and a second electrode between the second conductive line and the memory cell. The memory cell comprises a switching pattern, an intermediate electrode, a first resistivity control pattern, and a variable resistance pattern that are connected in series between the first conductive line and the second conductive line. Resistivity of the first resistivity control pattern is less than resistivity of the second electrode.

公开(公告)号：US20210013263A1

公开(公告)日：2021-01-14

申请号：US17030425

申请日：2020-09-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-Hyun JEONG ,  Gwan-hyeob KOH ,  Dae-hwan KANG

IPC: H01L27/24 ,  H01L27/102 ,  H01L45/00 ,  G11C13/00

Abstract: A memory device includes a first electrode line layer including a plurality of first electrode lines extending on a substrate in a first direction and being spaced apart from each other, a second electrode line layer including a plurality of second electrode lines extending on the first electrode line layer in a second direction that is different from the first direction and being spaced apart from each other, and a memory cell layer including a plurality of first memory cells located at a plurality of intersections between the plurality of first electrode lines and the plurality of second electrode lines, each first memory cell including a selection device layer, an intermediate electrode and a variable resistance layer that are sequentially stacked. A side surface of the variable resistance layer is perpendicular to a top surface of the substrate or inclined to be gradually wider toward an upper portion of the variable resistance layer. The first memory cell has a side surface slope so as to have a width gradually decreasing toward its upper portion.

公开(公告)号：US20190123277A1

公开(公告)日：2019-04-25

申请号：US15990913

申请日：2018-05-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-Hyun JEONG

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L27/2427 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1683

Abstract: A method of manufacturing a variable memory device includes forming a switching layer on a first conductive layer, forming a heating layer on the switching layer, the heating layer extending in a first direction, performing a first patterning process on the first conductive layer, the switching layer, and the heating layer to form a first trench extending in a second direction intersecting the first direction, forming variable resistance patterns on the heating layer, forming a second conductive layer on the variable resistance patterns, and performing a second patterning process on the switching layer, the heating layer, and the second conductive layer to form a second trench extending in the first direction and being between the variable resistance patterns.

公开(公告)号：US20180158872A1

公开(公告)日：2018-06-07

申请号：US15700154

申请日：2017-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： ILMOK PARK ,  Sungwon KIM ,  Seulji SONG ,  Ji-Hyun JEONG

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/2463 ,  H01L45/06 ,  H01L45/1253

Abstract: A variable resistance memory device may include a word line extending in a first direction, a bit line extending in a second direction crossing the first direction, a phase-changeable pattern provided between the word line and the bit line, a bottom electrode provided between the phase-changeable pattern and the word line, and a spacer provided on a side surface of the bottom electrode and between the phase-changeable pattern and the word line. The bottom electrode may include a first portion and a second portion, and the second portion is provided between the first portion and the spacer. The first and second portions of the bottom electrodes may have different lengths from each other in the second direction.