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公开(公告)号:US20160225896A1
公开(公告)日:2016-08-04
申请号:US14993108
申请日:2016-01-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jae-Hyun YOO , Jin-Hyun NOH , Kee-Moon CHUN , Jong-Sung JEON
CPC classification number: H01L29/7816 , H01L29/0619 , H01L29/063 , H01L29/165 , H01L29/7835 , H01L29/7848 , H01L29/7851
Abstract: A semiconductor device has reduced ON resistance (Ron) as well as a reduced electric field emanating from a current path. The semiconductor device includes a fin pattern, a gate electrode intersecting the fin pattern, a source region which has a first conductivity type and is disposed on one side of the gate electrode, a body region which has a second conductivity type, is situated within the fin pattern under the source region, and extends in a loop around the source region, a drain region which has the first conductivity type and is disposed on the other side of the gate electrode, a field dispersion region which has the second conductivity type and is situated within the fin pattern between the gate electrode and the drain region, and a drift region which has the first conductivity type, is situated within the fin pattern under the drain region and the field dispersion region, and extends in a loop around the drain region and the field dispersion region.
Abstract translation: 半导体器件具有降低的导通电阻(Ron)以及从电流路径发出的减小的电场。 半导体器件包括鳍状图案,与鳍状图案相交的栅极电极,具有第一导电类型并且设置在栅电极的一侧上的源极区域,具有第二导电类型的体区域位于 翅片图案,并且围绕源极区域以环形延伸,具有第一导电类型并设置在栅电极的另一侧的漏极区域,具有第二导电类型的场分散区域并且是 位于栅极电极和漏极区域之间的鳍状图案中,并且具有第一导电类型的漂移区域位于漏极区域和场分散区域下方的鳍状图案内,并且围绕漏极区域以环状延伸 和场分散区域。
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公开(公告)号:US20160343711A1
公开(公告)日:2016-11-24
申请号:US15228292
申请日:2016-08-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kwan-Young KIM , Jae-Hyun YOO , Jin-Hyun NOH , Woo-Yeol MAENG , Yong-Woo JEON
IPC: H01L27/088 , H01L29/08 , H01L29/06 , H01L23/528 , H01L29/78
CPC classification number: H01L27/0886 , H01L23/528 , H01L29/0649 , H01L29/0653 , H01L29/0865 , H01L29/0873 , H01L29/0882 , H01L29/4232 , H01L29/4236 , H01L29/7816 , H01L29/7835 , H01L29/785
Abstract: According to example embodiments, a semiconductor device includes a first fin, a second fin that is separated from the first fin, and a gate on the first fin and the second fin. The gate crosses the first fin and the second fin. The first fin includes a first doped area at both sides of the gate. The first doped area is configured to have a first voltage applied thereto. The second fin includes a second doped area at both sides of the gate. The second doped area is configured to have a second voltage applied thereto. The second voltage is different than the first voltage.
Abstract translation: 根据示例性实施例,半导体器件包括第一鳍片,与第一鳍片分离的第二鳍片和第一鳍片和第二鳍片上的栅极。 门穿过第一鳍和第二鳍。 第一鳍片包括在栅极两侧的第一掺杂区域。 第一掺杂区被配置为具有施加到其上的第一电压。 第二鳍片包括在栅极两侧的第二掺杂区域。 第二掺杂区被配置为具有施加到其上的第二电压。 第二电压不同于第一电压。
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公开(公告)号:US20170005162A1
公开(公告)日:2017-01-05
申请号:US15268833
申请日:2016-09-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jin-Hyun NOH , Su-Tae KIM , Jae-Hyun YOO , Byeong-Ryeol LEE , Jong-Sung JEON
CPC classification number: H01L29/063 , H01L27/0886 , H01L27/092 , H01L27/0922 , H01L29/0619 , H01L29/0653 , H01L29/0696 , H01L29/0847 , H01L29/0865 , H01L29/0882 , H01L29/1054 , H01L29/1095 , H01L29/161 , H01L29/165 , H01L29/408 , H01L29/4238 , H01L29/66545 , H01L29/66659 , H01L29/7816 , H01L29/7835 , H01L29/785 , H01L29/7851
Abstract: Semiconductor devices include a channel layer on a substrate, the channel layer including a material having a lattice constant different from a lattice constant of the substrate, a first gate electrode on the channel layer, a first source region of a first conductivity type at a first side of the first gate electrode, a first body region of a second conductivity type under the first source region and contacting the first source region, a first drain region of the first conductivity type disposed at a second side of the first gate electrode, a first drift region of the first conductivity type under the first drain region and contacting the first drain region, and a first stud region in the channel layer and the first drift region. The first stud region has an impurity concentration higher than an impurity concentration of the first drift region.
Abstract translation: 半导体器件包括在衬底上的沟道层,沟道层包括具有不同于衬底的晶格常数的晶格常数的材料,沟道层上的第一栅电极,第一导电类型的第一源极区 在所述第一源极区域的第一导电类型的第一主体区域和与所述第一源极区域接触的第一导电类型的第一主体区域,设置在所述第一栅极电极的第二侧的所述第一导电类型的第一漏极区域, 在第一漏区下面的第一导电类型的漂移区,并与第一漏极区以及沟道层和第一漂移区中的第一柱状区域接触。 第一螺柱区域的杂质浓度高于第一漂移区域的杂质浓度。
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