公开(公告)号：US20160225896A1

公开(公告)日：2016-08-04

申请号：US14993108

申请日：2016-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Hyun YOO ,  Jin-Hyun NOH ,  Kee-Moon CHUN ,  Jong-Sung JEON

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/7816 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/165 ,  H01L29/7835 ,  H01L29/7848 ,  H01L29/7851

Abstract: A semiconductor device has reduced ON resistance (Ron) as well as a reduced electric field emanating from a current path. The semiconductor device includes a fin pattern, a gate electrode intersecting the fin pattern, a source region which has a first conductivity type and is disposed on one side of the gate electrode, a body region which has a second conductivity type, is situated within the fin pattern under the source region, and extends in a loop around the source region, a drain region which has the first conductivity type and is disposed on the other side of the gate electrode, a field dispersion region which has the second conductivity type and is situated within the fin pattern between the gate electrode and the drain region, and a drift region which has the first conductivity type, is situated within the fin pattern under the drain region and the field dispersion region, and extends in a loop around the drain region and the field dispersion region.

Abstract translation: 半导体器件具有降低的导通电阻（Ron）以及从电流路径发出的减小的电场。 半导体器件包括鳍状图案，与鳍状图案相交的栅极电极，具有第一导电类型并且设置在栅电极的一侧上的源极区域，具有第二导电类型的体区域位于 翅片图案，并且围绕源极区域以环形延伸，具有第一导电类型并设置在栅电极的另一侧的漏极区域，具有第二导电类型的场分散区域并且是 位于栅极电极和漏极区域之间的鳍状图案中，并且具有第一导电类型的漂移区域位于漏极区域和场分散区域下方的鳍状图案内，并且围绕漏极区域以环状延伸 和场分散区域。

公开(公告)号：US20160104701A1

公开(公告)日：2016-04-14

申请号：US14697707

申请日：2015-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Hyun YOO ,  Kee-Moon CHUN

IPC: H01L27/02 ,  H01L23/535 ,  H01L29/08 ,  H02H9/04 ,  H01L29/16 ,  H01L27/06 ,  H01L29/06 ,  H01L27/088 ,  H01L29/161

CPC classification number: H01L27/0274 ,  H01L23/535 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/7848 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device including an electrostatic discharge (ESD) protection circuit includes an input port, a logic circuit receiving an input signal applied to the input port and generating an output signal based on the input signal, and an ESD protection circuit adjusting a level of the input signal when the level of the input signal exceeds a predetermined range. The ESD protection circuit includes a first fin and a second fin arranged on a semiconductor substrate in parallel, and a gate electrode formed in a direction crossing the first fin and the second fin, each of the first fin and the second fin includes a source region, a drain region, and a channel region disposed between the source region and the drain region, the channel region is disposed under the gate electrode, a source region of the first fin and a drain region of the second fin are disposed at a first side of the gate electrode, and a drain region of the first fin and a source region of the second fin are disposed at a second side of the gate electrode.

Abstract translation: 包括静电放电（ESD）保护电路的半导体器件包括输入端口，接收施加到输入端口的输入信号并基于输入信号产生输出信号的逻辑电路，以及ESD保护电路， 当输入信号的电平超过预定范围时输入信号。 ESD保护电路包括并联布置在半导体衬底上的第一鳍和第二鳍，以及沿与第一鳍和第二鳍交叉的方向形成的栅电极，每个第一鳍和第二鳍包括源极区域 漏极区域和设置在源极区域和漏极区域之间的沟道区域，沟道区域设置在栅电极下方，第一鳍片的源极区域和第二鳍片的漏极区域设置在第一侧面 并且第一鳍片的漏极区域和第二鳍片的源极区域设置在栅电极的第二侧。

公开(公告)号：US20160372593A1

公开(公告)日：2016-12-22

申请号：US15052177

申请日：2016-02-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Hyun YOO ,  Kwan-Young Kim ,  Jin-Hyun Noh ,  Kee-Moon Chun ,  Yong-Woo Jeon

IPC: H01L29/78 ,  H01L21/324 ,  H01L21/265 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7816 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/66795 ,  H01L29/7835 ,  H01L29/7851

Abstract: A semiconductor device includes a first well disposed in a substrate and including a first impurity of a first conductivity type, a second well disposed in the substrate, including a second impurity of a second conductivity type different from the first conductivity type, and having first to third portions, and a gate structure formed on the first well and the second well, wherein the second portion is disposed between the first portion and the third portion, the first portion and the third portion are formed deeper than the second portion, and concentration of the second impurity of the first portion and the third portion is greater than concentration of the second impurity of the second portion.

Abstract translation: 半导体器件包括：第一阱，其布置在衬底中并且包括第一导电类型的第一杂质;第二阱，设置在衬底中，包括不同于第一导电类型的第二导电类型的第二杂质，并且首先 第三部分和形成在第一阱和第二阱上的栅极结构，其中第二部分设置在第一部分和第三部分之间，第一部分和第三部分形成得比第二部分更深，并且浓度 第一部分和第三部分的第二杂质大于第二部分的第二杂质的浓度。

公开(公告)号：US20170005162A1

公开(公告)日：2017-01-05

申请号：US15268833

申请日：2016-09-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Hyun NOH ,  Su-Tae KIM ,  Jae-Hyun YOO ,  Byeong-Ryeol LEE ,  Jong-Sung JEON

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/08 ,  H01L29/10 ,  H01L29/78

CPC classification number: H01L29/063 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0922 ,  H01L29/0619 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/1054 ,  H01L29/1095 ,  H01L29/161 ,  H01L29/165 ,  H01L29/408 ,  H01L29/4238 ,  H01L29/66545 ,  H01L29/66659 ,  H01L29/7816 ,  H01L29/7835 ,  H01L29/785 ,  H01L29/7851

Abstract: Semiconductor devices include a channel layer on a substrate, the channel layer including a material having a lattice constant different from a lattice constant of the substrate, a first gate electrode on the channel layer, a first source region of a first conductivity type at a first side of the first gate electrode, a first body region of a second conductivity type under the first source region and contacting the first source region, a first drain region of the first conductivity type disposed at a second side of the first gate electrode, a first drift region of the first conductivity type under the first drain region and contacting the first drain region, and a first stud region in the channel layer and the first drift region. The first stud region has an impurity concentration higher than an impurity concentration of the first drift region.

Abstract translation: 半导体器件包括在衬底上的沟道层，沟道层包括具有不同于衬底的晶格常数的晶格常数的材料，沟道层上的第一栅电极，第一导电类型的第一源极区 在所述第一源极区域的第一导电类型的第一主体区域和与所述第一源极区域接触的第一导电类型的第一主体区域，设置在所述第一栅极电极的第二侧的所述第一导电类型的第一漏极区域， 在第一漏区下面的第一导电类型的漂移区，并与第一漏极区以及沟道层和第一漂移区中的第一柱状区域接触。 第一螺柱区域的杂质浓度高于第一漂移区域的杂质浓度。

公开(公告)号：US20170256533A1

公开(公告)日：2017-09-07

申请号：US15603969

申请日：2017-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Hyun YOO ,  Jin-Tae KIM ,  Jong-Sung JEON

IPC: H01L27/02 ,  H01L27/06

CPC classification number: H01L27/0266 ,  H01L27/0248 ,  H01L27/0285 ,  H01L27/0288 ,  H01L27/0629

Abstract: An electrostatic discharge (ESD) protection device includes a substrate including a plurality of fins extending in a first direction, with an insulation layer on the fins. A gate electrode extending in a second direction, an electrode pattern of a capacitor, and a resistor are on the insulation layer. A drain is on a first side of the gate electrode, and a source is on a second side of the gate electrode. A connection structure electrically connects the electrode pattern, the gate electrode and the resistor. The electrode pattern is on the first side or the second side of the gate electrode, and the resistor is on the other of the first side or the second side. At least a portion of the resistor extends in the second direction.

公开(公告)号：US20160343711A1

公开(公告)日：2016-11-24

申请号：US15228292

申请日：2016-08-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwan-Young KIM ,  Jae-Hyun YOO ,  Jin-Hyun NOH ,  Woo-Yeol MAENG ,  Yong-Woo JEON

IPC: H01L27/088 ,  H01L29/08 ,  H01L29/06 ,  H01L23/528 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L23/528 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0865 ,  H01L29/0873 ,  H01L29/0882 ,  H01L29/4232 ,  H01L29/4236 ,  H01L29/7816 ,  H01L29/7835 ,  H01L29/785

Abstract: According to example embodiments, a semiconductor device includes a first fin, a second fin that is separated from the first fin, and a gate on the first fin and the second fin. The gate crosses the first fin and the second fin. The first fin includes a first doped area at both sides of the gate. The first doped area is configured to have a first voltage applied thereto. The second fin includes a second doped area at both sides of the gate. The second doped area is configured to have a second voltage applied thereto. The second voltage is different than the first voltage.

Abstract translation: 根据示例性实施例，半导体器件包括第一鳍片，与第一鳍片分离的第二鳍片和第一鳍片和第二鳍片上的栅极。 门穿过第一鳍和第二鳍。 第一鳍片包括在栅极两侧的第一掺杂区域。 第一掺杂区被配置为具有施加到其上的第一电压。 第二鳍片包括在栅极两侧的第二掺杂区域。 第二掺杂区被配置为具有施加到其上的第二电压。 第二电压不同于第一电压。

公开(公告)号：US20150102394A1

公开(公告)日：2015-04-16

申请号：US14509365

申请日：2014-10-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Hyun YOO ,  Jin-Tae KIM ,  Jong-Sung JEON

IPC: H01L27/02 ,  H01L27/06

CPC classification number: H01L27/0266 ,  H01L27/0248 ,  H01L27/0285 ,  H01L27/0288 ,  H01L27/0629

Abstract: An electrostatic discharge (ESD) protection device includes a substrate including a plurality of active fins and a plurality of grooves. The ESD protection device includes an insulation layer on the active fins and the grooves, and a gate electrode on the active fins. The ESD protection device includes a first impurity region adjacent to a first side of the gate electrode, and a second impurity region adjacent to a second side of the gate electrode. The second side of the gate electrode may be arranged opposite to the first side. The ESD protection device includes an electrode pattern of a capacitor overlapping the first impurity region, a resistor overlapping the second impurity region, and a connection structure electrically connecting the electrode pattern, the gate electrode, and the resistor to each other.

Abstract translation: 静电放电（ESD）保护装置包括具有多个活动散热片和多个槽的基板。 ESD保护装置包括有源散热片和沟槽上的绝缘层，以及活性散热片上的栅电极。 ESD保护器件包括与栅极电极的第一侧相邻的第一杂质区域和与栅极电极的第二侧相邻的第二杂质区域。 栅电极的第二侧可以布置成与第一侧相对。 ESD保护装置包括与第一杂质区重叠的电容器的电极图案，与第二杂质区域重叠的电阻器以及将电极图案，栅极电极和电阻器彼此电连接的连接结构。

公开(公告)号：US20150001641A1

公开(公告)日：2015-01-01

申请号：US14282230

申请日：2014-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Hyun YOO ,  Young-Keun LEE ,  Wook LEE ,  Jong-Sung JEON

IPC: H01L29/78

CPC classification number: H01L29/0649 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/1033 ,  H01L29/1041 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/66795 ,  H01L29/7833 ,  H01L29/7836 ,  H01L29/785

Abstract: A transistor and a semiconductor device, the semiconductor device including an active region; a gate electrode on the active region; and a gate dielectric between the gate electrode and the active region, wherein the active region includes a first part overlapped by the gate electrode, and second and third parts facing each other with the first part therebetween, the first part of the active region includes a first portion having a first width and a second portion having a second width, the second width being greater than the first width, and the second portion of the active region is closer to the second part of the active region than to the third part of the active region.

Abstract translation: 一种晶体管和半导体器件，所述半导体器件包括有源区; 有源区上的栅电极; 以及栅电极和有源区之间的栅极电介质，其中所述有源区包括与所述栅电极重叠的第一部分，以及彼此面对的第二部分和第三部分，所述有源区的所述第一部分包括： 具有第一宽度的第一部分和具有第二宽度的第二部分，第二宽度大于第一宽度，并且有源区域的第二部分更接近有源区域的第二部分，而不是第二部分的第三部分 活跃区域。