公开(公告)号：US20170213842A1

公开(公告)日：2017-07-27

申请号：US15067855

申请日：2016-03-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-chul PARK ,  Bio KIM ,  Young-Gu KIM ,  Jaehoon JEONG ,  Eunsuk CHO ,  Hyejin CHO ,  Jong In YUN

IPC: H01L27/115 ,  H01L29/06 ,  H01L21/02 ,  H01L29/10 ,  H01L21/28

CPC classification number: H01L27/11582 ,  H01L21/02164 ,  H01L21/02238 ,  H01L28/00 ,  H01L29/0649 ,  H01L29/1037 ,  H01L29/40117

Abstract: A semiconductor memory device includes a substrate, a stack disposed on the substrate, a vertical channel structure penetrating the stack, and a fixed charge layer disposed in the vertical channel structure. The stack includes insulating patterns and gate electrodes alternately and repeatedly disposed on one another. The vertical channel structure includes a data storing pattern.