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公开(公告)号：US10672488B2
公开(公告)日：2020-06-02
申请号：US16699981
申请日：2019-12-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jin Bae Bang , Joon Suc Jang
Abstract: A memory device includes a page buffer unit including a plurality of latches latching each of a plurality of pieces of dummy data of selected memory cells according to a plurality of dummy signals provided by a word line of the selected memory cells, and a control logic comparing a count value of a first count latch among the plurality of latches with a reference count value, determining whether to count a second count latch other than the first count latch according to a result of the comparison, and correcting a level of a read signal provided by the word line of the selected memory cells in a read operation.
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公开(公告)号：US20200105355A1
公开(公告)日：2020-04-02
申请号：US16699981
申请日：2019-12-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jin Bae Bang , Joon Suc Jang
Abstract: A memory device includes a page buffer unit including a plurality of latches latching each of a plurality of pieces of dummy data of selected memory cells according to a plurality of dummy signals provided by a word line of the selected memory cells, and a control logic comparing a count value of a first count latch among the plurality of latches with a reference count value, determining whether to count a second count latch other than the first count latch according to a result of the comparison, and correcting a level of a read signal provided by the word line of the selected memory cells in a read operation.
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公开(公告)号：US11869599B2
公开(公告)日：2024-01-09
申请号：US18064635
申请日：2022-12-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jungmin Park , Kyunghoon Sung , Ilhan Park , Jisang Lee , Joon Suc Jang , Sanghyun Joo
CPC classification number: G11C16/24 , G11C16/0483 , G11C16/10 , H01L24/00 , H01L25/0657 , H01L25/18 , H01L2224/08145 , H01L2924/1431 , H01L2924/14511
Abstract: A nonvolatile memory device includes cell strings commonly connected between bitlines and a source line where the cell strings are grouped into memory blocks. During a precharge period, channels of the cell strings of a selected memory block are precharged by applying a gate induced drain leakage (GIDL) on voltage to gates of GIDL transistors included in the cell strings of the selected memory block where the GIDL on voltage has a voltage level to induce GIDL. During the precharge period, precharge of channels of the cell strings of an unselected memory block are prevented by controlling a gate voltage of GIDL transistors included in the cell strings of the unselected memory block to prevent the GIDL. During a program execution period after the precharge period, memory cells of the selected memory block connected to a selected wordline are programmed by applying a program voltage to the selected wordline.
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公开(公告)号：US11527293B2
公开(公告)日：2022-12-13
申请号：US17341837
申请日：2021-06-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jungmin Park , Kyunghoon Sung , Ilhan Park , Jisang Lee , Joon Suc Jang , Sanghyun Joo
Abstract: A nonvolatile memory device includes cell strings commonly connected between bitlines and a source line where the cell strings are grouped into memory blocks. During a precharge period, channels of the cell strings of a selected memory block are precharged by applying a gate induced drain leakage (GIDL) on voltage to gates of GIDL transistors included in the cell strings of the selected memory block where the GIDL on voltage has a voltage level to induce GIDL. During the precharge period, precharge of channels of the cell strings of an unselected memory block are prevented by controlling a gate voltage of GIDL transistors included in the cell strings of the unselected memory block to prevent the GIDL. During a program execution period after the precharge period, memory cells of the selected memory block connected to a selected wordline are programmed by applying a program voltage to the selected wordline.
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