公开(公告)号：US10672488B2

公开(公告)日：2020-06-02

申请号：US16699981

申请日：2019-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bae Bang ,  Joon Suc Jang

IPC: G11C16/34 ,  G11C16/26 ,  G11C11/56

Abstract: A memory device includes a page buffer unit including a plurality of latches latching each of a plurality of pieces of dummy data of selected memory cells according to a plurality of dummy signals provided by a word line of the selected memory cells, and a control logic comparing a count value of a first count latch among the plurality of latches with a reference count value, determining whether to count a second count latch other than the first count latch according to a result of the comparison, and correcting a level of a read signal provided by the word line of the selected memory cells in a read operation.

公开(公告)号：US20200105355A1

公开(公告)日：2020-04-02

申请号：US16699981

申请日：2019-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bae Bang ,  Joon Suc Jang

IPC: G11C16/34 ,  G11C11/56 ,  G11C16/26

Abstract: A memory device includes a page buffer unit including a plurality of latches latching each of a plurality of pieces of dummy data of selected memory cells according to a plurality of dummy signals provided by a word line of the selected memory cells, and a control logic comparing a count value of a first count latch among the plurality of latches with a reference count value, determining whether to count a second count latch other than the first count latch according to a result of the comparison, and correcting a level of a read signal provided by the word line of the selected memory cells in a read operation.

公开(公告)号：US10910080B2

公开(公告)日：2021-02-02

申请号：US16865675

申请日：2020-05-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bae Bang ,  Seung Hwan Song ,  Dae Seok Byeon ,  Il Han Park ,  Hyun Jun Yoon ,  Han Jun Lee ,  Na Young Choi

IPC: G11C27/00 ,  G11C11/56 ,  G06F11/10 ,  G11C16/28 ,  G06F3/06 ,  G11C16/26 ,  G11C16/04

Abstract: A nonvolatile memory device may include a page buffer including a plurality of latch sets that latch each page datum of selected memory cells among a plurality of memory cells according to each of read signal sets including at least one read signal, and a control logic configured to detect a degradation level of the memory cells and determine a read parameter applied to at least one of the read signal sets based on the detected degradation level.

公开(公告)号：US10665312B2

公开(公告)日：2020-05-26

申请号：US16154111

申请日：2018-10-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bae Bang ,  Seung Hwan Song ,  Dae Seok Byeon ,  Il Han Park ,  Hyun Jun Yoon ,  Han Jun Lee ,  Na Young Choi

IPC: G11C27/00 ,  G11C11/56 ,  G06F11/10 ,  G11C16/28 ,  G06F3/06 ,  G11C16/26 ,  G11C16/04

Abstract: A nonvolatile memory device may include a page buffer including a plurality of latch sets that latch each page datum of selected memory cells among a plurality of memory cells according to each of read signal sets including at least one read signal, and a control logic configured to detect a degradation level of the memory cells and determine a read parameter applied to at least one of the read signal sets based on the detected degradation level.