公开(公告)号：US20200161301A1

公开(公告)日：2020-05-21

申请号：US16726322

申请日：2019-12-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Uk Han ,  Taek Yong Kim ,  Satoru Yamada ,  Jun Hee Lim ,  Ki Jae Hur

IPC: H01L27/092 ,  H01L21/762 ,  H01L21/8238 ,  G11C11/408

Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.

公开(公告)号：US10916543B2

公开(公告)日：2021-02-09

申请号：US16726322

申请日：2019-12-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Uk Han ,  Taek Yong Kim ,  Satoru Yamada ,  Jun Hee Lim ,  Ki Jae Hur

IPC: H01L27/088 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/762 ,  G11C11/408 ,  H01L29/423 ,  H01L23/522 ,  H01L23/528 ,  G11C11/4097 ,  H01L27/02

Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.

公开(公告)号：US20180301456A1

公开(公告)日：2018-10-18

申请号：US15821089

申请日：2017-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min Hee Cho ,  Jun Soo Kim ,  Hui Jung Kim ,  Tae Yoon An ,  Satoru Yamada ,  Won Sok Lee ,  Nam Ho Jeon ,  Moon Young Jeong ,  Ki Jae Hur ,  Jae Ho Hong

IPC: H01L27/108 ,  H01L27/12

CPC classification number: H01L27/10802 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10844 ,  H01L27/10876 ,  H01L27/1207 ,  H01L29/4236

Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.

公开(公告)号：US10770463B2

公开(公告)日：2020-09-08

申请号：US16437784

申请日：2019-06-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min Hee Cho ,  Jun Soo Kim ,  Hui Jung Kim ,  Tae Yoon An ,  Satoru Yamada ,  Won Sok Lee ,  Nam Ho Jeon ,  Moon Young Jeong ,  Ki Jae Hur ,  Jae Ho Hong

IPC: H01L27/108 ,  H01L27/12 ,  H01L21/84 ,  H01L29/423 ,  H01L21/768

Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.

公开(公告)号：US10515962B2

公开(公告)日：2019-12-24

申请号：US15827231

申请日：2017-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Uk Han ,  Taek Yong Kim ,  Satoru Yamada ,  Jun Hee Lim ,  Ki Jae Hur

IPC: H01L27/092 ,  G11C11/408 ,  H01L21/762 ,  H01L21/8238 ,  H01L29/423 ,  H01L23/522 ,  H01L23/528 ,  H01L27/02 ,  G11C11/4097

Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.

公开(公告)号：US10361205B2

公开(公告)日：2019-07-23

申请号：US15821089

申请日：2017-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min Hee Cho ,  Jun Soo Kim ,  Hui Jung Kim ,  Tae Yoon An ,  Satoru Yamada ,  Won Sok Lee ,  Nam Ho Jeon ,  Moon Young Jeong ,  Ki Jae Hur ,  Jae Ho Hong

IPC: H01L27/108 ,  H01L27/12 ,  H01L21/768 ,  H01L29/423

Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.

公开(公告)号：US20180294264A1

公开(公告)日：2018-10-11

申请号：US15827231

申请日：2017-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Uk Han ,  Taek Yong Kim ,  Satoru Yamada ,  Jun Hee Lim ,  Ki Jae Hur

IPC: H01L27/092 ,  H01L21/8238 ,  H01L21/762

Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.