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    MEMORY MODULE, MEMORY DEVICE, AND PROCESSING DEVICE HAVING A PROCESSOR MODE, AND MEMORY SYSTEM
    2.
    发明申请
    MEMORY MODULE, MEMORY DEVICE, AND PROCESSING DEVICE HAVING A PROCESSOR MODE, AND MEMORY SYSTEM 审中-公开

    公开(公告)号：US20190354292A1

    公开(公告)日：2019-11-21

    申请号：US16524749

    申请日：2019-07-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seong-Il O ,  Nam Sung KIM ,  Young-Hoon SON ,  Chan-Kyung KIM ,  Ho-Young SONG ,  Jung Ho AHN ,  Sang-Joon HWANG

    IPC: G06F3/06 ,  G06F13/16

    Abstract: A memory module includes a memory device, a command/address buffering device, and a processing data buffer. The memory device includes a memory cell array, a first set of input/output terminals, each terminal configured to receive first command/address bits, and a second set of input/output terminals, each terminal configured to receive both data bits and second command/address bits. The command/address buffering device is configured to output the first command/address bits to the first set of input/output terminals. The processing data buffer is configured to output the data bits and second command/address bits to the second set of input/output terminals. The memory device is configured such that the first command/address bits, second command/address bits, and data bits are all used to access the memory cell array.

    MEMORY DEVICE, AND MEMORY SYSTEM INCLUDING THE SAME
    4.
    发明申请
    MEMORY DEVICE, AND MEMORY SYSTEM INCLUDING THE SAME 有权
    存储器件和包括其的存储器系统

    公开(公告)号：US20160071561A1

    公开(公告)日：2016-03-10

    申请号：US14801707

    申请日：2015-07-16

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Tae-Yoon LEE ,  Myeong-O KIM ,  Kyo-Min SOHN ,  Sang-Joon HWANG

    IPC: G11C7/12 ,  G11C7/22 ,  G11C7/06

    CPC classification number: G11C7/12 ,  G11C11/4076 ,  G11C11/4094

    Abstract: A memory device may include a pre-charge control circuit, an active control circuit, and a driver circuit. The pre-charge control circuit may be configured to receive an active command after receiving a pre-charge command for a first bank, determine whether or not a pre-charge operation for the first bank has ended when receiving the active command, and generate an active instruction signal according to a result of the determination. The active control circuit may be configured to generate an active control signal for an active operation according to the active instruction signal. The driver circuit may be configured to control an active operation according to the active control signal.

    Abstract translation: 存储器件可以包括预充电控制电路，有源控制电路和驱动器电路。 预充电控制电路可以被配置为在接收到用于第一组的预充电命令之后接收有效命令，确定在接收到活动命令时第一组的预充电操作是否已经结束，并且生成 根据确定的结果激活指令信号。 有源控制电路可以被配置为根据有效指令信号产生用于有效操作的有效控制信号。 驱动器电路可以被配置为根据主动控制信号来控制有效操作。

    SEMICONDUCTOR MEMORY DEVICE AND COMPUTER SYSTEM INCLUDING THE SAME
    5.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND COMPUTER SYSTEM INCLUDING THE SAME 有权
    半导体存储器件和包括其的计算机系统

    公开(公告)号：US20140143478A1

    公开(公告)日：2014-05-22

    申请号：US14015536

    申请日：2013-08-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyun-Sung SHIN ,  Sang-Joon HWANG ,  Seung-Man SHIN ,  In-Su CHOI ,  Jung-Ho JUNG

    IPC: G06F12/02

    CPC classification number: G06F12/06 ,  G06F2212/205 ,  G11C11/005 ,  G11C2029/4402

    Abstract: A semiconductor memory device includes a first memory block of a first type of memory; and a second memory block of a second type of memory having a different type from the first type. A first address region of the first memory block and a second address region of the second memory block are included in the same address domain. Each of the first and second memory blocks is accessed by an address signal including an address of the address domain, and the second memory block is a nonvolatile memory.

    Abstract translation: 半导体存储器件包括第一类型存储器的第一存储器块; 以及具有与第一类型不同类型的第二类型存储器的第二存储块。 第一存储块的第一地址区和第二存储块的第二地址区被包括在相同的地址域中。 第一和第二存储块中的每一个被包括地址域的地址的地址信号访问，而第二存储块是非易失性存储器。

    SEMICONDUCTOR MEMORY DEVICE INCLUDING SENSING VERIFICATION UNIT
    6.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE INCLUDING SENSING VERIFICATION UNIT 有权
    包含传感验证单元的半导体存储器件

    公开(公告)号：US20130242635A1

    公开(公告)日：2013-09-19

    申请号：US13795567

    申请日：2013-03-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Je-Min YU ,  Ho-Young SONG ,  Sung-Min SEO ,  Sang-Joon HWANG

    IPC: G11C17/00

    CPC classification number: G11C17/00 ,  G11C17/16 ,  G11C17/18

    Abstract: A semiconductor memory device includes a memory cell array configured to store data including a verification code; a sensing unit configured to sense the stored data including the verification code; and a verification unit configured to determine whether the sensing unit is able to sense the stored data based on a sensing condition, wherein the verification unit is configured to determine whether the sensing unit is able to sense the stored data based on the sensing condition and a value of the verification code sensed by the sensing unit.

    Abstract translation: 半导体存储器件包括：存储单元阵列，被配置为存储包括验证码的数据; 感测单元，被配置为感测存储的包括验证码的数据; 以及验证单元，被配置为基于感测条件来确定所述感测单元是否能够感测所存储的数据，其中所述验证单元被配置为基于所述感测条件来确定所述感测单元是否能够感测所存储的数据，以及 由感测单元感测的验证码的值。

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