公开(公告)号：US09698021B2

公开(公告)日：2017-07-04

申请号：US14970105

申请日：2015-12-15

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Min-Joo Lee ,  Weon-Hong Kim ,  Moon-Kyun Song ,  Dong-Su Yoo ,  Soo-Jung Choi

IPC分类号： H01L21/28 ,  H01L21/02 ,  C23C16/455 ,  C23C16/458

CPC分类号： H01L21/28194 ,  C23C16/45544 ,  C23C16/4584 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/02205 ,  H01L21/0228

摘要： In a method of forming a layer, a substrate is loaded into a chamber and placed at a home position that is a first relative angular position. A process cycle is performed a number of times while the substrate is at the home position. The cycle includes directing source gas onto the substrate at a first location adjacent the periphery of the substrate, purging the chamber, directing reaction gas onto the substrate from the first location, and purging the chamber. The cycle is performed another number of times while the substrate is at another relative angular position, i.e., at a position rotated about its general center relative from the home position.

公开(公告)号：US20160049478A1

公开(公告)日：2016-02-18

申请号：US14678331

申请日：2015-04-03

申请人： Samsung Electronics Co., Ltd.

发明人： Moon-Kyun Song ,  Weon-Hong Kim ,  Soo-Jung Choi ,  Yoon-Tae Hwang

IPC分类号： H01L29/40 ,  H01L29/49 ,  H01L29/51

CPC分类号： H01L29/4966 ,  H01L21/28088 ,  H01L21/823821 ,  H01L21/823842 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66795

摘要： A method for fabricating a semiconductor device comprises forming a gate insulation layer on a substrate including a first region and a second region, forming a first gate conductive layer and a capping layer on the first region and the second region and heat-treating the substrate, removing the capping layer from the first region and the second region, forming a second gate conductive layer on the first region and the second region, nitriding the second gate conductive layer, and forming a third gate conductive layer on the second region.

摘要翻译： 一种制造半导体器件的方法包括在包括第一区域和第二区域的衬底上形成栅极绝缘层，在第一区域和第二区域上形成第一栅极导电层和覆盖层，并对衬底进行热处理， 从所述第一区域和所述第二区域移除所述覆盖层，在所述第一区域和所述第二区域上形成第二栅极导电层，氮化所述第二栅极导电层，以及在所述第二区域上形成第三栅极导电层。

公开(公告)号：US10790282B2

公开(公告)日：2020-09-29

申请号：US16229207

申请日：2018-12-21

申请人： Samsung Electronics Co., Ltd.

发明人： Soo-Jung Choi ,  Dong-Hyun Roh ,  Sung-Soo Kim ,  Gyu-Hwan Ahn ,  Sang-Jin Hyun

IPC分类号： H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L21/308

摘要： A semiconductor device may include active fins spaced apart from each other by a recess therebetween, each of the active fins protruding from an upper surface of a substrate, an isolation structure including a liner on a lower surface and a sidewall of a lower portion of the recess and a blocking pattern on the liner, the blocking pattern filling a remaining portion of the lower portion of the recess and including a nitride, a carbide or polysilicon, a gate electrode structure on the active fins and the isolation structure, and a source/drain layer on a portion of each of the active fins adjacent to the gate electrode structure.