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公开(公告)号：US20200176062A1
公开(公告)日：2020-06-04
申请号：US16529100
申请日：2019-08-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yoo-jung LEE , Jang-seok CHOI , Duk-sung KIM , Hyun-joong KIM
Abstract: A memory device includes: a memory cell array including a security region configured to store security data; and a security management circuit configured to store a guard key and, responsive to receiving a data operation command for the security region, limit a data operation for the security region by comparing the guard key with an input password that is received by the memory device.
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公开(公告)号：US20140057427A1
公开(公告)日：2014-02-27
申请号：US14070935
申请日：2013-11-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dong-Kwon KIM , Young-Ju PARK , Dong-Hyuk YEAM , Yoo-jung LEE , Myeong-cheol KIM , Do-Hyoung KIM , Heung-Sik PARK
IPC: H01L21/28
CPC classification number: H01L21/28132 , H01L21/28114 , H01L29/42376 , H01L29/4966 , H01L29/66545 , H01L29/6656
Abstract: Example embodiments relate to a method for manufacturing a semiconductor device, wherein a metal gate electrode therein may be formed without a void in a lower portion of the metal gate electrode. The method may include providing a substrate, forming a dummy gate electrode on the substrate, forming a gate spacer on the substrate to be contiguous to the dummy gate electrode, forming a first recess by simultaneously removing a portion of the dummy gate electrode and a portion of the gate spacer, the first recess having an upper end wider than a lower end, forming a second recess by removing the dummy gate electrode remaining after forming the first recess, and forming a metal gate electrode by depositing a metal to fill the first and second recesses.
Abstract translation: 示例性实施例涉及用于制造半导体器件的方法，其中可以在金属栅电极的下部中形成其中的金属栅极电极，而不产生空隙。 该方法可以包括提供衬底，在衬底上形成虚拟栅电极，在衬底上形成与虚拟栅电极相邻的栅极间隔物，通过同时去除虚拟栅电极的一部分形成第一凹槽， 所述第一凹部具有比下端更宽的上端，通过去除在形成所述第一凹部之后残留的所述虚设栅电极形成第二凹槽，以及通过沉积金属以填充所述第一凹部而形成金属栅电极，以填充所述第一凹部 第二个凹槽
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