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Patent Agency Ranking
公开(公告)号：US20230420624A1
公开(公告)日：2023-12-28
申请号：US17789567
申请日：2022-06-23
Inventor： Chuanbao LUO
CPC classification number: H01L33/62 , G09F9/3026 , G09F9/33 , H01L33/54 , H01L33/005 , H01L2933/005 , H01L2933/0066
Abstract: The present application provides a display panel, a manufacturing method thereof, and a splicing display device. The display panel includes: a substrate; a driving circuit layer, and the driving circuit layer includes a plurality of thin film transistors; light-emitting units; and a plurality of scanning lines and a plurality of data lines disposed on a side of the substrate away from the driving circuit layer. The display panel comprises a plurality of display areas, and each of the display areas is provided with one of the light-emitting units and one of the thin film transistors electrically connected to the one of the light-emitting units, one of the scanning lines, and one of the data lines, respectively.
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公开(公告)号：US20240186336A1
公开(公告)日：2024-06-06
申请号：US17796655
申请日：2022-07-29
Inventor： Chuanbao LUO , Kai ZHOU
IPC: H01L27/12
CPC classification number: H01L27/1248 , H01L27/127
Abstract: A display panel and a manufacturing method thereof are disclosed. The display panel includes an oxide active part, a gate electrode, conduction protective parts, a passivation part, and a source-drain electrode. The oxide active part includes a semiconductor part and conductor parts, and the passivation part is disposed on the gate electrode and the conduction protective parts. The source-drain electrode is disposed on one side of the conduction protective parts and the oxide active part and is connected to the conductor parts. Therefore, a reaction between the passive part and the conductor parts is less likely to occur, thereby ensuring a performance of the display panel.
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公开(公告)号：US20240136415A1
公开(公告)日：2024-04-25
申请号：US18059242
申请日：2022-11-28
Inventor： Kai ZHOU , Chuanbao LUO
IPC: H01L29/417 , H01L29/66 , H01L29/786 , H01L33/00 , H01L33/38 , H01L33/62
CPC classification number: H01L29/41733 , H01L29/66742 , H01L29/78633 , H01L29/78696 , H01L33/005 , H01L33/382 , H01L33/62 , H01L2933/0016 , H01L2933/0066
Abstract: A display panel and a method of manufacturing the same, and a display device are provided. A first metal layer is disposed on a substrate and includes a source electrode and a drain electrode. An active layer is disposed on a side of the first metal layer away from the substrate and includes an active portion. The active portion includes a conductor sublayer and a semiconductor sublayer. The conductor sublayer includes a first conductor subsection and a second conductor subsection spaced apart from each other, and the semiconductor sublayer is connected at least between the first conductor subsection and the second conductor subsection.
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公开(公告)号：US20240234524A9
公开(公告)日：2024-07-11
申请号：US18059242
申请日：2022-11-28
Inventor： Kai ZHOU , Chuanbao LUO
IPC: H01L29/417 , H01L29/66 , H01L29/786 , H01L33/00 , H01L33/38 , H01L33/62
CPC classification number: H01L29/41733 , H01L29/66742 , H01L29/78633 , H01L29/78696 , H01L33/005 , H01L33/382 , H01L33/62 , H01L2933/0016 , H01L2933/0066
Abstract: A display panel and a method of manufacturing the same, and a display device are provided. A first metal layer is disposed on a substrate and includes a source electrode and a drain electrode. An active layer is disposed on a side of the first metal layer away from the substrate and includes an active portion. The active portion includes a conductor sublayer and a semiconductor sublayer. The conductor sublayer includes a first conductor subsection and a second conductor subsection spaced apart from each other, and the semiconductor sublayer is connected at least between the first conductor subsection and the second conductor subsection.
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公开(公告)号：US20240063233A1
公开(公告)日：2024-02-22
申请号：US18081125
申请日：2022-12-14
Inventor： Chuanbao LUO
IPC: H01L27/12
CPC classification number: H01L27/1288 , H01L27/1251
Abstract: An array substrate includes at least one low temperature polysilicon thin film transistor and at least one oxide thin film transistor. The low temperature polysilicon thin film transistor includes an active layer and a first gate electrode. The oxide thin film transistor includes an oxide semiconductor layer, a second source electrode, and a second drain electrode. The first gate electrode, the second source electrode, and the second drain electrode are disposed in a same layer, and the active layer and the oxide semiconductor layer are disposed in different layers. A method is used for fabricating the array substrate. A display panel includes the array substrate.
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