公开(公告)号：US20240021973A1

公开(公告)日：2024-01-18

申请号：US18345400

申请日：2023-06-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Harshpreet Singh Phull BAKSHI ,  Rajen Manicon MURUGAN ,  Sylvester ANKAMAH-KUSI

IPC: H01Q1/22 ,  H01Q1/48 ,  H01Q9/04 ,  H01L23/522 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01Q1/2283 ,  H01Q1/48 ,  H01Q9/0407 ,  H01L23/5226 ,  H01L23/3107 ,  H01L21/56 ,  H01L2224/48245 ,  H01L24/48

Abstract: In examples, a semiconductor package comprises a semiconductor substrate including a device side having circuitry formed therein. The package also includes a conductive layer positioned above the semiconductor substrate; a patch antenna coupled to the conductive layer and to the device side of the semiconductor substrate; and a mold compound covering the patch antenna. The mold compound has a relative permittivity ranging from 3.4 to 3.5 and a loss tangent ranging from 0.0025 to 0.013.

公开(公告)号：US20240429216A1

公开(公告)日：2024-12-26

申请号：US18650795

申请日：2024-04-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jie CHEN ,  Rajen MURUGAN ,  Sylvester ANKAMAH-KUSI ,  Harshpreet Singh Phull BAKSHI ,  Jonathan NOQUIL

IPC: H01L25/16 ,  H01L21/48 ,  H01L23/00 ,  H01L23/13 ,  H01L23/498

Abstract: An example method includes forming a cavity in a multi-layer substrate of a leadframe. The cavity extends from a first substrate surface of the leadframe into the multi-layer substrate to define a cavity floor spaced from the first substrate surface by a cavity sidewall, and at least one conductive terminal is on the cavity floor. The method also includes placing an inductor module in the cavity, in which the inductor module includes a conductor embedded within a dielectric substrate between spaced apart first and second inductor terminals of the inductor module. The method also includes coupling at least one of the first and second inductor terminals to the at least one conductive terminal on the cavity floor. The method also includes encapsulating the inductor module and at least a portion of the leadframe with a mold compound.

公开(公告)号：US20240071959A1

公开(公告)日：2024-02-29

申请号：US18345296

申请日：2023-06-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Harshpreet Singh Phull BAKSHI ,  Sylvester ANKAMAH-KUSI ,  Siraj AKHTAR ,  Rajen Manicon MURUGAN

IPC: H01L23/64 ,  H01L21/02 ,  H01L21/288 ,  H01L21/3205 ,  H01L21/56 ,  H01L21/768 ,  H01L23/31 ,  H01L23/498 ,  H01L25/16

CPC classification number: H01L23/645 ,  H01L21/022 ,  H01L21/288 ,  H01L21/3205 ,  H01L21/565 ,  H01L21/76877 ,  H01L23/3107 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L25/16

Abstract: In examples, a semiconductor package comprises a conductive terminal; a semiconductor die including a device side having circuitry formed therein, the device side facing toward the conductive terminal; and a substrate coupled to the conductive terminal and to the device side of the semiconductor die. The substrate includes a first metal layer coupled to first and second vias extending toward and coupled to either the device side of the semiconductor die or the conductive terminal. The substrate includes a second metal layer electrically isolated from the first metal layer by an insulation layer between the first and second metal layers, the second metal layer coupled to a third via extending toward and coupled to either the conductive terminal or the semiconductor die. The first and second metal layers form a Marchand balun.