公开(公告)号：US10666279B1

公开(公告)日：2020-05-26

申请号：US16287711

申请日：2019-02-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Matthew John Ascher Schurmann ,  Mayank Jain ,  Wenkai Wu ,  Preetam Charan Anand Tadeparthy ,  Kuang-Yao Cheng

IPC: H03M1/12 ,  H03M1/10 ,  H03M1/16 ,  H03K19/173

Abstract: A circuit includes a phase control logic, an analog-to-digital converter (ADC), and digital logic. The phase control logic is configured to couple to a plurality of power phases of a multi-phase power supply. The digital logic is configured to couple to the phase control logic and the ADC, to receive an instruction to operate in a self-calibration mode of operation, receive a first message including a value associated with a calibrated load configured to couple to the plurality of power phases, perform a self-calibration sub-routine for each power phase of the plurality of power phases based at least partially on the received instruction, the received first message, and a signal received from the ADC, and receive a second message instructing the digital logic to store a result of the self-calibration in a memory of the circuit.

公开(公告)号：US11682900B2

公开(公告)日：2023-06-20

申请号：US17339576

申请日：2021-06-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rajesh Venugopal ,  Matthew John Ascher Schurmann ,  Preetam Charan Anand Tadeparthy ,  Rengang Chen

IPC: H02J1/10 ,  G06F1/3203 ,  H02M3/158

CPC classification number: H02J1/106 ,  G06F1/3203 ,  H02M3/158

Abstract: A system includes a first power stage circuit having a first PWM input, a first voltage input and a first power output. The first power stage circuit is configured to provide a first current at the first power output responsive to a PWM signal at the first PWM input, and configured to receive a voltage at the first voltage input. The system includes a second power stage circuit having a second PWM input, a second voltage input and a second power output. The second voltage input is coupled to the first voltage input, and the second power stage circuit is configured to provide a second current at the second power output responsive to the PWM signal at the second PWM input. The second power stage circuit is configured to receive the voltage at the second voltage input, the voltage representing an average of the first current and the second current.

公开(公告)号：US11888393B2

公开(公告)日：2024-01-30

申请号：US17537595

申请日：2021-11-30

Applicant: Texas Instruments Incorporated

Inventor： Muthusubramanian Venkateswaran ,  Rohit Narula ,  Preetam Charan Anand Tadeparthy ,  Matthew John Ascher Schurmann ,  Rajesh Venugopal

IPC: H02M3/155 ,  H02M1/32 ,  H02M1/08 ,  H02M1/36 ,  H02M3/158

CPC classification number: H02M3/155 ,  H02M1/08 ,  H02M1/32 ,  H02M1/36 ,  H02M3/1586

Abstract: A multiphase controller includes an integrator enable terminal, a pulse width modulator, an error integrator, an open drain driver, and an integrator enable circuit. The integrator enable terminal is adapted to be coupled to the integrator enable terminal of a different instance of the multiphase controller. The pulse width modulator is configured to modulate a power stage. The error integrator is configured to control the pulse width modulator. The open drain driver is coupled to the integrator enable circuit. The integrator enable circuit is coupled to the pulse width modulator, the error integrator, the open drain driver, and the integrator enable terminal. The integrator enable circuit is configured to activate the open drain driver responsive to generation of a power stage control pulse by the pulse width modulator, and activate the error integrator responsive to a logic low signal at the integrator enable terminal.