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公开(公告)号:US11411387B2
公开(公告)日:2022-08-09
申请号:US16658311
申请日:2019-10-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Mayank Jain , Preetam Tadeparthy , Rohit Narula , Shobhit Singhal
Abstract: An over/under voltage protection circuit includes a voltage input terminal, a digital-to analog converter, a comparator, and a control circuit. The comparator includes a first input coupled to an output of the digital-to-analog converter, and a second input coupled to the voltage input terminal. The control circuit includes an output coupled to an input of the digital-to-analog converter, and an input coupled to an output of the comparator. The control circuit is configured to set the digital-to-analog converter to generate an overvoltage fault threshold responsive to the output of the comparator indicating that voltage of a signal at the voltage input terminal exceeds a threshold currently generated by the digital-to-analog converter.
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公开(公告)号:US10892771B1
公开(公告)日:2021-01-12
申请号:US16582243
申请日:2019-09-25
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rohit Narula , Preetam Charan Anand Tadeparthy , Mayank Jain
Abstract: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) having a resistor network. The resistor network includes a first and second segments. The first segment includes a first switch coupled between a first supply voltage node and a first set of resistors. The second segment includes a second switch coupled between the first supply voltage node and a second set of resistors. The first segment includes a third switch coupled in series with a second resistor. The series-combination of the third switch and second resistor coupled in parallel with at least one resistor of the first set of resistors. The second segment includes a fourth switch coupled in series with a third resistor. The series-combination of the fourth switch and third resistor is coupled in parallel with at least one resistor of the second set of resistors.
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公开(公告)号:US11888393B2
公开(公告)日:2024-01-30
申请号:US17537595
申请日:2021-11-30
Applicant: Texas Instruments Incorporated
Inventor: Muthusubramanian Venkateswaran , Rohit Narula , Preetam Charan Anand Tadeparthy , Matthew John Ascher Schurmann , Rajesh Venugopal
CPC classification number: H02M3/155 , H02M1/08 , H02M1/32 , H02M1/36 , H02M3/1586
Abstract: A multiphase controller includes an integrator enable terminal, a pulse width modulator, an error integrator, an open drain driver, and an integrator enable circuit. The integrator enable terminal is adapted to be coupled to the integrator enable terminal of a different instance of the multiphase controller. The pulse width modulator is configured to modulate a power stage. The error integrator is configured to control the pulse width modulator. The open drain driver is coupled to the integrator enable circuit. The integrator enable circuit is coupled to the pulse width modulator, the error integrator, the open drain driver, and the integrator enable terminal. The integrator enable circuit is configured to activate the open drain driver responsive to generation of a power stage control pulse by the pulse width modulator, and activate the error integrator responsive to a logic low signal at the integrator enable terminal.
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公开(公告)号:US11294411B1
公开(公告)日:2022-04-05
申请号:US16950239
申请日:2020-11-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: A power stage controller includes: a multi-phase pulse control circuit; a current sense circuit; a comparator; an error amplifier; and a mode controller. The mode controller includes a mode controller input and a summation circuit. The summation circuit has a first summation circuit input, a second summation circuit input and a summation circuit output, the first summation circuit input is coupled to the error amplifier output, and the summation circuit output is coupled to the first comparator input. The mode controller is configured to: select one of a main controller mode or a secondary controller mode responsive to a mode control voltage at the mode controller input; bypass the summation circuit responsive to selection of the main controller mode; and enable the summation circuit responsive to selection of the secondary controller mode.
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公开(公告)号:US20250062700A1
公开(公告)日:2025-02-20
申请号:US18451363
申请日:2023-08-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Mohamed Ahmed , Matthew Schurmann , Preetam Tadeparthy , Rohit Narula , Vikram Gakhar , Vikas Lakhanpal , Karthik Anyam , Rengang Chen
IPC: H02M7/537
Abstract: A power controller comprises a control loop configured to control timing of pulsed signals that activate phases of a coupled inductor voltage regulator based on current demand of a load circuit and comprises a transient detection circuit configured to determine a projected current through a compensation inductor of the coupled inductor voltage regulator based on a state of the phases and operating parameters of the coupled inductor voltage regulator. The transient detection circuit is configured to detect a transient in the current demand of the load circuit based on a variability in phase-to-phase overlap of the pulsed signals. Responsive to detecting the transient, the transient detection circuit is configured to apply a correction to the control loop that alters the timing of the pulsed signals based on the projected current through the compensation inductor.
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公开(公告)号:US20250062695A1
公开(公告)日:2025-02-20
申请号:US18621376
申请日:2024-03-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rohit Narula , Vikram Gakhar , Preetam Tadeparthy , Nischal R.
IPC: H02M3/335 , G01R19/165
Abstract: Some examples relate to a circuit including a plurality of input pins, a plurality of output pins, a pulse width modulated (PWM) controller, and an inductor-open detection circuit. The PWM controller has a plurality of inputs and a plurality of outputs. The plurality of inputs of the PWM controller are coupled to the plurality of input pins, and the plurality of outputs of the PWM controller are coupled to the plurality of output pins. The inductor-open detection circuit has an input coupled to a pin of the plurality of input pins, and has an output coupled to the PWM controller.
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公开(公告)号:US10897267B1
公开(公告)日:2021-01-19
申请号:US16731280
申请日:2019-12-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Naman Bafna , Muthusubramanian Venkateswaran , Rohit Narula
Abstract: A circuit includes a first voltage divider having a set of most significant bit (MSB) outputs each representative of a value of a MSB portion of a digital code. The circuit also includes a second voltage divider having a first upper voltage input configured to couple to a first one of a first pair of outputs of the set of MSB outputs, and a first lower voltage input configured to couple to a second one of the first pair of outputs of the set of MSB outputs. The circuit also includes a third voltage divider having a second upper voltage input configured to couple to a first one of a second pair of outputs of the set of MSB outputs, and a second lower voltage input configured to couple to a second one of the second pair of outputs of the set of MSB outputs.
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