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    Voltage identification signal decoder
    2.
    发明授权
    Voltage identification signal decoder 有权

    公开(公告)号：US12079054B2

    公开(公告)日：2024-09-03

    申请号：US17874696

    申请日：2022-07-27

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Vishal Shaw ,  Preetam Tadeparthy ,  Mayank Jain ,  Karthik Anyam

    IPC: G06F1/26 ,  H02M3/04 ,  H03M7/02

    CPC classification number: G06F1/26 ,  H02M3/04 ,  H03M7/02

    Abstract: One example includes a VID signal decoder circuit. The circuit includes a coarse resolution decoder that receives a VID signal. The VID signal can be encoded with a digital value of an output voltage. The coarse resolution decoder can decode the VID signal to generate a first digital signal. The circuit also includes a fine resolution decoder that receives the VID signal and to decode the VID signal to generate a second digital signal. The circuit further includes a multiplexer to provide the first digital signal as an output signal responsive to a first state of a selection signal and to provide the second digital signal as the output signal responsive to a second state of the selection signal. The first and second states of the selection signal can be based on a relative amplitude of the first and second digital signals.

    METHODS AND APPARATUS TO CALIBRATE MULTIPHASE BUCK REGULATORS
    4.
    发明公开
    METHODS AND APPARATUS TO CALIBRATE MULTIPHASE BUCK REGULATORS 审中-公开

    公开(公告)号：US20240213880A1

    公开(公告)日：2024-06-27

    申请号：US18140418

    申请日：2023-04-27

    Applicant: Texas Instruments Incorporated

    Inventor： Vikas Lakhanpal ,  Preetam Charan Anand Tadeparthy ,  Sreelakshmi S ,  Mayank Jain ,  Charan Hemanth Kumar

    IPC: H02M3/158

    CPC classification number: H02M3/1586

    Abstract: An example non-transitory machine-readable storage medium includes instructions that, when executed, configure processor circuitry to at least: determine a first delay corresponding to an amount of time for a first pulse to reach first phase circuitry; determine a second delay corresponding to an amount of time for a second pulse to reach second phase circuitry; determine a third delay corresponding to an amount of time for a third pulse to reach third phase circuitry, wherein one or more of the first phase circuitry, the second phase circuitry, and the third phase circuitry are located a non-uniform distance from the processor circuitry; and transmit, based on the delays, the pulses to the respective phase circuitry such that a first time period between the first pulse and the second pulse is equal to a second time period between the second pulse and the third pulse.

    Segmented resistor digital-to-analog converter
    6.
    发明授权
    Segmented resistor digital-to-analog converter 有权

    公开(公告)号：US10892771B1

    公开(公告)日：2021-01-12

    申请号：US16582243

    申请日：2019-09-25

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Rohit Narula ,  Preetam Charan Anand Tadeparthy ,  Mayank Jain

    IPC: H03M1/78 ,  H03M1/46

    Abstract: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) having a resistor network. The resistor network includes a first and second segments. The first segment includes a first switch coupled between a first supply voltage node and a first set of resistors. The second segment includes a second switch coupled between the first supply voltage node and a second set of resistors. The first segment includes a third switch coupled in series with a second resistor. The series-combination of the third switch and second resistor coupled in parallel with at least one resistor of the first set of resistors. The second segment includes a fourth switch coupled in series with a third resistor. The series-combination of the fourth switch and third resistor is coupled in parallel with at least one resistor of the second set of resistors.

    Power supply telemetry self-calibration
    7.
    发明授权
    Power supply telemetry self-calibration 有权

    公开(公告)号：US10666279B1

    公开(公告)日：2020-05-26

    申请号：US16287711

    申请日：2019-02-27

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Matthew John Ascher Schurmann ,  Mayank Jain ,  Wenkai Wu ,  Preetam Charan Anand Tadeparthy ,  Kuang-Yao Cheng

    IPC: H03M1/12 ,  H03M1/10 ,  H03M1/16 ,  H03K19/173

    Abstract: A circuit includes a phase control logic, an analog-to-digital converter (ADC), and digital logic. The phase control logic is configured to couple to a plurality of power phases of a multi-phase power supply. The digital logic is configured to couple to the phase control logic and the ADC, to receive an instruction to operate in a self-calibration mode of operation, receive a first message including a value associated with a calibrated load configured to couple to the plurality of power phases, perform a self-calibration sub-routine for each power phase of the plurality of power phases based at least partially on the received instruction, the received first message, and a signal received from the ADC, and receive a second message instructing the digital logic to store a result of the self-calibration in a memory of the circuit.

    COMPARATOR WITH NOISE CANCELLATION FOR SWITCHING POWER CONVERTERS
    8.
    发明申请
    COMPARATOR WITH NOISE CANCELLATION FOR SWITCHING POWER CONVERTERS 有权

    公开(公告)号：US20250096680A1

    公开(公告)日：2025-03-20

    申请号：US18673633

    申请日：2024-05-24

    Applicant: Texas Instruments Incorporated

    Inventor： Yash Shah ,  Dattatreya Baragur Suryanarayana ,  Bikash Pradhan ,  Mayank Jain

    IPC: H02M3/158 ,  H03K5/24

    Abstract: Comparator circuitry for power converters. In an example, a circuit includes a comparator having a first comparator input, a second comparator input, and a comparator output, the comparator coupled to a supply terminal. The circuit further includes a first transistor coupled between a boot terminal and the first comparator input and having a control terminal coupled to a switching terminal, and a second transistor coupled between the boot terminal and the second comparator input and having a control terminal coupled to the switching terminal. Also, a third transistor is coupled between the supply terminal and the second comparator input, and a voltage reference generator is coupled to the supply terminal and to a control terminal of the third transistor.

    POWER CONVERTER CONTROL
    10.
    发明公开
    POWER CONVERTER CONTROL 审中-公开

    公开(公告)号：US20240039402A1

    公开(公告)日：2024-02-01

    申请号：US18376230

    申请日：2023-10-03

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Naman Bafna ,  Muthusubramanian Venkateswaran ,  Mayank Jain ,  Vikram Gakhar ,  Vikas Lakhanpal ,  Preetam Charan Anand Tadeparthy ,  Pamidi Ramasiddaiah

    IPC: H02M3/155 ,  H03K5/24 ,  H02M1/08

    CPC classification number: H02M3/155 ,  H03K5/24 ,  H02M1/08

    Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.

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