Cascode structure for linear regulators and clamps

    公开(公告)号:US10291163B2

    公开(公告)日:2019-05-14

    申请号:US15142219

    申请日:2016-04-29

    Abstract: A voltage regulator includes an output transistor, an error amplifier coupled to the output transistor, a cascode transistor coupled to the output transistor in series, and a cascode bias circuit coupled to the cascode transistor and the output transistor. The output transistor is configured to generate an output signal at a first voltage. The error amplifier is configured to receive a reference signal. The cascode bias circuit is configured to bias the cascode transistor such that, in response to a drain-to-source short circuit of the output transistor, the cascode transistor generates the output signal at the first voltage.

    Stable level shifters in high slew rate or noisy environments

    公开(公告)号:US11722126B2

    公开(公告)日:2023-08-08

    申请号:US17463001

    申请日:2021-08-31

    CPC classification number: H03K3/013 H03K3/012 H03K3/356 H02K11/33

    Abstract: A system includes a level shifter coupled to a voltage source, a first transistor, and a second transistor. The system also includes a first current source coupled to the first transistor and the second transistor and configured to bias the first transistor and the second transistor. The system includes a slew detector coupled to the voltage source and to the first current source, where the slew detector is configured to detect a change in voltage of the voltage source, and further configured to provide current to the first current source responsive to detecting the change. The system also includes a second current source coupled in parallel to the first current source, where the second current source is configured to provide current to the first current source responsive to a control signal.

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