Semiconductor structure
    3.
    发明授权

    公开(公告)号:US11616035B2

    公开(公告)日:2023-03-28

    申请号:US17397765

    申请日:2021-08-09

    Abstract: A semiconductor structure, including a substrate and multiple chips, is provided. The chips are stacked on the substrate. Each of the chips has a first side and a second side opposite to each other. Each of the chips includes a transistor adjacent to the first side and a storage node adjacent to the second side. Two adjacent chips are bonded to each other. The transistor of one of the two adjacent chips is electrically connected to the storage node of the other one of the two adjacent chips to form a memory cell.

    SEMICONDUCTOR STRUCTURE
    4.
    发明申请

    公开(公告)号:US20230025541A1

    公开(公告)日:2023-01-26

    申请号:US17397765

    申请日:2021-08-09

    Abstract: A semiconductor structure, including a substrate and multiple chips, is provided. The chips are stacked on the substrate. Each of the chips has a first side and a second side opposite to each other. Each of the chips includes a transistor adjacent to the first side and a storage node adjacent to the second side. Two adjacent chips are bonded to each other. The transistor of one of the two adjacent chips is electrically connected to the storage node of the other one of the two adjacent chips to form a memory cell.

    Method for manufacturing capacitor structure

    公开(公告)号:US12034038B2

    公开(公告)日:2024-07-09

    申请号:US18119043

    申请日:2023-03-08

    CPC classification number: H01L28/91

    Abstract: A method for manufacturing a capacitor structure is provided. A substrate having a first side and a second side opposite to the first side is provided. A plurality of first trenches are formed on the first side. A first capacitor is formed extending along the first side and into the first trenches. A plurality of second trenches are formed on the second side. A second capacitor is formed extending along the second side and into the second trenches.

    SEMICONDUCTOR PROCESS
    7.
    发明申请

    公开(公告)号:US20170352736A1

    公开(公告)日:2017-12-07

    申请号:US15682525

    申请日:2017-08-21

    Abstract: A fin-shaped field effect transistor includes a substrate and a gate. The substrate includes an active area, where the active area includes a fin structure having at least an extension part protruding from the fin structure. The gate is disposed over the fin structure and directly on the extension part. The present invention also provides a planar field effect transistor including a substrate and a gate. The substrate includes an active area, where the active area includes a frame area and a penetrating area penetrating through the frame area. The gate is disposed over the active area, where the gate is directly disposed on the penetrating area, and the frame area at least at a side of the gate constitutes a source/drain surrounding an isolation island.

    Capacitor structure and method for manufacturing the same

    公开(公告)号:US12040354B2

    公开(公告)日:2024-07-16

    申请号:US18119009

    申请日:2023-03-08

    CPC classification number: H01L28/91

    Abstract: A capacitor structure comprises a substrate having a first side, a second side opposite to the first side and an upper surface corresponding to the first side; a plurality of first trenches formed on the first side of the substrate, disposed along a first direction and a second direction parallel to the upper surface, and penetrating the substrate along a third direction, the first direction, the second direction and the third direction orthogonal to each other; a plurality of second trenches formed on the second side of the substrate and penetrating the substrate along the third direction, the first trenches and the second trenches separated from each other in the first direction; a first capacitor extending along the first side and into the first trenches; and a second capacitor extending along the second side and into the second trenches.

    Planar field effect transistor
    9.
    发明授权

    公开(公告)号:US10068979B2

    公开(公告)日:2018-09-04

    申请号:US15677035

    申请日:2017-08-15

    Abstract: A fin-shaped field effect transistor includes a substrate and a gate. The substrate includes an active area, where the active area includes a fin structure having at least an extension part protruding from the fin structure. The gate is disposed over the fin structure and directly on the extension part. The present invention also provides a planar field effect transistor including a substrate and a gate. The substrate includes an active area, where the active area includes a frame area and a penetrating area penetrating through the frame area. The gate is disposed over the active area, where the gate is directly disposed on the penetrating area, and the frame area at least at a side of the gate constitutes a source/drain surrounding an isolation island.

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