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公开(公告)号:US20200274827A1
公开(公告)日:2020-08-27
申请号:US16870814
申请日:2020-05-08
Applicant: Xilinx, Inc.
Inventor: Steven L. Pope , Derek Roberts , David J. Riddoch , Dmitri Kitariev
IPC: H04L12/931 , H04L12/883 , H04L12/935 , H04L29/06 , H04L12/933 , H04L12/721
Abstract: Roughly described: a network interface device has an interface. The interface is coupled to first network interface device circuitry, host interface circuitry and host offload circuitry. The host interface circuitry is configured to interface to a host device and has a scheduler configured to schedule providing and/or receiving of data to/from the host device. The interface is configured to allow at least one of: data to be provided to said host interface circuitry from at least one of said first network device interface circuitry and said host offload circuitry; and data to be provided from said host interface circuitry to at least one of said first network interface device circuitry and said host offload circuitry.
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公开(公告)号:US10686731B2
公开(公告)日:2020-06-16
申请号:US16226453
申请日:2018-12-19
Applicant: XILINX, INC.
Inventor: Steven L. Pope , Derek Roberts , David J. Riddoch , Dmitri Kitariev
IPC: H04L12/931 , H04L12/883 , H04L12/935 , H04L29/06 , H04L12/933 , H04L12/721
Abstract: Roughly described: a network interface device has an interface. The interface is coupled to first network interface device circuitry, host interface circuitry and host offload circuitry. The host interface circuitry is configured to interface to a host device and has a scheduler configured to schedule providing and/or receiving of data to/from the host device. The interface is configured to allow at least one of: data to be provided to said host interface circuitry from at least one of said first network device interface circuitry and said host offload circuitry; and data to be provided from said host interface circuitry to at least one of said first network interface device circuitry and said host offload circuitry.
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公开(公告)号:US20230006945A1
公开(公告)日:2023-01-05
申请号:US17867646
申请日:2022-07-18
Applicant: Xilinx, Inc.
Inventor: Steven L. Pope , Derek Roberts , David J. Riddoch , Dmitri Kitariev
IPC: H04L49/506 , H04L49/90 , H04L49/00 , H04L69/16 , H04L49/103 , H04L45/00 , H04L49/101
Abstract: Roughly described: a network interface device has an interface. The interface is coupled to first network interface device circuitry, host interface circuitry and host offload circuitry. The host interface circuitry is configured to interface to a host device and has a scheduler configured to schedule providing and/or receiving of data to/from the host device. The interface is configured to allow at least one of: data to be provided to said host interface circuitry from at least one of said first network device interface circuitry and said host offload circuitry; and data to be provided from said host interface circuitry to at least one of said first network interface device circuitry and said host offload circuitry.
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公开(公告)号:US20220060434A1
公开(公告)日:2022-02-24
申请号:US17515343
申请日:2021-10-29
Applicant: Xilinx, Inc.
Inventor: Steven L. Pope , Dmitri Kitariev , Derek Roberts
IPC: H04L12/861 , H04L29/06 , H04L12/707 , H04L12/801 , G06N20/00 , G06F9/50
Abstract: A network interface device has an interface configured to interface with a network. The interface is configured to at least one of receive data from the network and put data onto the network. The network interface device has an application specific integrated device with a plurality of data processing pipelines to process at least one of data which has been received from the network and data which is to be put onto said network and an FPGA arranged in a path parallel to the data processing pipelines.
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公开(公告)号:US20220027273A1
公开(公告)日:2022-01-27
申请号:US17493694
申请日:2021-10-04
Applicant: Xilinx, Inc.
Inventor: Steven L. Pope , Dmitri Kitariev , David J. Riddoch , Derek Roberts , Neil Turton
IPC: G06F12/0831 , G06F9/38 , G06F12/0888 , G06F13/28
Abstract: A network interface device comprises a programmable interface configured to provide a device interface with at least one bus between the network interface device and a host device. The programmable interface is programmable to support a plurality of different types of a device interface.
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公开(公告)号:US11138116B2
公开(公告)日:2021-10-05
申请号:US16525313
申请日:2019-07-29
Applicant: XILINX, INC.
Inventor: Steven L. Pope , Dmitri Kitariev , David J. Riddoch , Derek Roberts , Neil Turton
IPC: G06F12/0831 , G06F9/38 , G06F12/0888 , G06F13/28 , G06F13/38 , G06F13/42 , G06F13/12
Abstract: A network interface device comprises a programmable interface configured to provide a device interface with at least one bus between the network interface device and a host device. The programmable interface is programmable to support a plurality of different types of a device interface.
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公开(公告)号:US20250147799A1
公开(公告)日:2025-05-08
申请号:US18501868
申请日:2023-11-03
Applicant: Xilinx, Inc.
Inventor: Thomas Calvert , Ripduman Sohan , Dmitri Kitariev , Kimon Karras , Stephan Diestelhorst , Neil Turton , David Riddoch , Derek Roberts , Kieran Mansley , Steven Pope
IPC: G06F9/48
Abstract: A computer-implemented method for task management can include managing performance of a task on a message by a plurality of circuits. In some aspects, the task can comprise a sequence of processings to be performed on the message and each circuit of the plurality of circuits performing a processing of the sequence of processings. In some aspects, the method can include routing, based on the sequence, a first information regarding the task to a first circuit of the plurality of circuits to perform a first processing of the sequence of processings on the message; receiving, from the first circuit, an output of the first processing; and routing, based on the sequence of processings identified for the task, a second information regarding the task to a second circuit of the plurality of circuits to perform a second processing that follows the first processing in the sequence of processings.
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公开(公告)号:US11165720B2
公开(公告)日:2021-11-02
申请号:US15847742
申请日:2017-12-19
Applicant: XILINX, INC.
Inventor: Steven L. Pope , Dmitri Kitariev , Derek Roberts
IPC: H04L12/861 , H04L29/06 , H04L12/707 , H04L12/801 , G06N20/00 , G06F9/50 , G06F30/394
Abstract: A network interface device has an interface configured to interface with a network. The interface is configured to at least one of receive data from the network and put data onto the network. The network interface device has an application specific integrated device with a plurality of data processing pipelines to process at least one of data which has been received from the network and data which is to be put onto said network and an FPGA arranged in a path parallel to the data processing pipelines.
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公开(公告)号:US10742782B2
公开(公告)日:2020-08-11
申请号:US15607221
申请日:2017-05-26
Applicant: XILINX, INC.
Inventor: Steven L. Pope , Derek Roberts , Neil Turton
Abstract: A network interface device is provided. The network interface device comprises an input configured to receive a data frame from a network. The network interface device also comprises a timing component configured to store, for the data frame, first timing information and compensation information. The compensation information is specific to the frame. The first timing information and said compensation information representing a time when the data frame was received.
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公开(公告)号:US10601874B2
公开(公告)日:2020-03-24
申请号:US16134795
申请日:2018-09-18
Applicant: XILINX, INC.
Inventor: Steven L. Pope , David J. Riddoch , Derek Roberts
IPC: H04L29/06
Abstract: A rule engine receives data flows. The data flows are between a network and an application. The rule engine determines data flow information and in dependence on the information performs an action with respect to said flow. A controller provides control information to the rule engine to define one or more actions. The communications between said rule engine and said controller are secure.
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