Integrated circuit package testing
    1.
    发明授权
    Integrated circuit package testing 有权
    集成电路封装测试

    公开(公告)号:US09341668B1

    公开(公告)日:2016-05-17

    申请号:US14242760

    申请日:2014-04-01

    Applicant: Xilinx, Inc.

    CPC classification number: G01R31/2889 G01R1/0416

    Abstract: A testable circuit arrangement includes an integrated circuit (IC) package. The IC package includes a package substrate, an interposer mounted directly on the package substrate with level 1 interconnects, and at least one IC die mounted directly on the interposer with level 0 interconnects. The package substrate of the IC package is mounted directly on a connector board with a soldered ball grid array of level 2 interconnects. The level 0, level 1, and level 2 interconnects include respective power, configuration, and test interconnects. Power, configuration, and test terminals of the connector board are coupled to the power, configuration, and test interconnects of the level 2 interconnects.

    Abstract translation: 可测试电路装置包括集成电路(IC)封装。 IC封装包括封装衬底,直接安装在具有级别1互连的封装衬底上的插入件以及直接安装在具有0级互连的插入器上的至少一个IC管芯。 IC封装的封装基板直接安装在具有2级互连的焊接球栅格阵列的连接器板上。 0级,1级和2级互连包括各自的功率,配置和测试互连。 连接器板的电源,配置和测试端子耦合到2级互连的电源,配置和测试互连。

    Increased usable programmable device dice
    2.
    发明授权
    Increased usable programmable device dice 有权
    增加可用可编程器件芯片

    公开(公告)号:US09372956B1

    公开(公告)日:2016-06-21

    申请号:US14537295

    申请日:2014-11-10

    Applicant: Xilinx, Inc.

    CPC classification number: G06F17/5081 G06F17/5054

    Abstract: A method of enabling the use of a programmable device having impaired circuitry includes determining one or more locations of the impaired circuitry of the programmable device; generating a defect map for the programmable device based on the determined locations of the impaired circuitry; generating a plurality of configuration bitstreams to implement a circuit in the programmable device; selecting one of the plurality of configuration bitstreams that does not use the impaired circuitry indicated by the defect map; and programming the programmable device with the selected configuration bitstream.

    Abstract translation: 能够使用具有受损电路的可编程设备的方法包括确定可编程设备的受损电路的一个或多个位置; 基于所确定的受损电路的位置,生成可编程设备的缺陷图; 生成多个配置比特流以实现可编程设备中的电路; 选择不使用由缺陷图指示的受损电路的多个配置比特流中的一个; 以及使用所选择的配置比特流对可编程设备进行编程。

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