公开(公告)号：US20070075952A1

公开(公告)日：2007-04-05

申请号：US11526059

申请日：2006-09-25

申请人： Yoshihisa Hamahashi ,  Tomoya Ishikawa ,  Tetsuo Asada ,  Yoshito Date ,  Yasuyuki Doi

发明人： Yoshihisa Hamahashi ,  Tomoya Ishikawa ,  Tetsuo Asada ,  Yoshito Date ,  Yasuyuki Doi

IPC分类号： G09G3/36

CPC分类号： G09G3/2011 ,  G09G2310/027 ,  G09G2320/0233

摘要： Each of first and second decoders outputs two voltages each having a voltage value equal to any one of a plurality of gray-level voltages according to gray-level data as two selection voltages or outputs any two of the plurality of gray-level voltages according to gray-level data as the two selection voltages. A connection switching circuit associates one of the first and second decoders with a first differential amplifier and the other decoder with a second differential amplifier. An output switching circuit associates one of the first and second differential amplifiers with a first output node and the other differential amplifier with a second output node. Each of the first and second differential amplifiers synthesizes selection voltages output from the decoder associated with the differential amplifier to generate a driving voltage and outputs the generated driving voltage to the output node associated with the differential amplifier.

摘要翻译： 第一解码器和第二解码器中的每一个根据作为两个选择电压的灰度级数据输出各自具有等于多个灰度级电压中的任何一个的电压值的两个电压，或者输出多个灰度级电压中的任何两个根据 灰度级数据作为两个选择电压。 连接切换电路将第一和第二解码器中的一个与第一差分放大器和另一个解码器与第二差分放大器相关联。 输出切换电路将第一和第二差分放大器之一与第一输出节点和另一个具有第二输出节点的差分放大器相关联。 第一和第二差分放大器中的每一个合成从与差分放大器相关联的解码器输出的选择电压以产生驱动电压，并将产生的驱动电压输出到与差分放大器相关联的输出节点。

公开(公告)号：US20050174145A1

公开(公告)日：2005-08-11

申请号：US10513965

申请日：2003-08-27

申请人： Shiro Dosho ,  Yusuke Tokunaga ,  Yasuyuki Doi ,  Hirofumi Nakagawa ,  Yoshito Date ,  Tetsuro Ohmori ,  Kaori Nishikawa

发明人： Shiro Dosho ,  Yusuke Tokunaga ,  Yasuyuki Doi ,  Hirofumi Nakagawa ,  Yoshito Date ,  Tetsuro Ohmori ,  Kaori Nishikawa

IPC分类号： G09G3/36 ,  H04L25/02 ,  H04L25/49 ,  H03K19/094

CPC分类号： G09G3/3685 ,  G09G2310/027 ,  G09G2330/06 ,  H04L25/0272 ,  H04L25/4902

摘要： In the process of transferring a clock signal and a plurality of data signals which are in synchronization with the clock signal, a driving pulse width of a driver switch is feedback-controlled by a clock transmission system (12), whereby the clock signal is transmitted at a small amplitude. A control signal having the pulse width is used for controlling the driver switch in each data transmission system (13), whereby transfer of each data signal at a small amplitude is realized at the same time. Further, in a clock reception system (10), the control signal having the pulse width is used in delay control of a clock delay circuit, whereby an optimum latch timing of received data in each data reception system (11) is realized.

摘要翻译： 在传送与时钟信号同步的时钟信号和多个数据信号的过程中，驱动器开关的驱动脉冲宽度被时钟传输系统（12）反馈控制，从而传输时钟信号 在一个小幅度。 具有脉冲宽度的控制信号用于控制每个数据传输系统（13）中的驱动器开关，从而同时实现以小幅度传送每个数据信号。 此外，在时钟接收系统（10）中，具有脉冲宽度的控制信号用于时钟延迟电路的延迟控制，从而实现每个数据接收系统（11）中的接收数据的最佳锁存定时。

公开(公告)号：US07119802B2

公开(公告)日：2006-10-10

申请号：US10350421

申请日：2003-01-24

申请人： Tooru Suyama ,  Tsutomu Sakakibara ,  Tomokazu Kojima ,  Tetsuro Ohmori ,  Yoshito Date ,  Yasuyuki Doi ,  Masahiro Akabori ,  Kenji Miyake ,  Miki Fujino ,  Takahito Kushima ,  Tsukasa Kawahara ,  Kazuhiko Nagaoka ,  Shinji Miyamoto ,  Yoshiyuki Konishi

发明人： Tooru Suyama ,  Tsutomu Sakakibara ,  Tomokazu Kojima ,  Tetsuro Ohmori ,  Yoshito Date ,  Yasuyuki Doi ,  Masahiro Akabori ,  Kenji Miyake ,  Miki Fujino ,  Takahito Kushima ,  Tsukasa Kawahara ,  Kazuhiko Nagaoka ,  Shinji Miyamoto ,  Yoshiyuki Konishi

IPC分类号： G09G5/00

CPC分类号： H03F3/45941 ,  G09G3/3655 ,  G09G2330/022 ,  H03F3/45946 ,  H03F2203/45622 ,  H03F2203/45732

摘要： A compact-size driving voltage controller is provided which can be driven with low power. The compact-size driving voltage controller which can be driven with low power includes a High output operational amplifier and a Low output operational amplifier for supplying driving voltages VcomH, VcomL to a load such as a liquid crystal display panel, an output switch for alternating between the outputs of the operational amplifiers, a Low voltage setting operational amplifier for generating a set voltage to be supplied to the non-inverted input terminal of the Low output operational amplifier, a set voltage generator including a current mirror circuit and a clamping circuit, a bias current controller for controlling the bias current flowing in each operational amplifier with a predetermined timing, and a timing controller for controlling the changeover timing of the output switch.

摘要翻译： 提供了可以以低功率驱动的紧凑型驱动电压控制器。 可以以低功率驱动的紧凑型驱动电压控制器包括高输出运算放大器和用于向诸如液晶显示面板的负载提供驱动电压VcomH，VcomL的低输出运算放大器，用于在 运算放大器的输出，用于产生要提供给低输出运算放大器的非反相输入端的设定电压的低电压设置运算放大器，包括电流镜电路和钳位电路的设定电压发生器， 偏置电流控制器，用于以预定定时控制在每个运算放大器中流动的偏置电流;以及定时控制器，用于控制输出开关的转换定时。

公开(公告)号：US07009426B2

公开(公告)日：2006-03-07

申请号：US10513965

申请日：2003-08-27

申请人： Shiro Dosho ,  Yusuke Tokunaga ,  Yasuyuki Doi ,  Hirofumi Nakagawa ,  Yoshito Date ,  Tetsuro Ohmori ,  Kaori Nishikawa

发明人： Shiro Dosho ,  Yusuke Tokunaga ,  Yasuyuki Doi ,  Hirofumi Nakagawa ,  Yoshito Date ,  Tetsuro Ohmori ,  Kaori Nishikawa

IPC分类号： H03K19/00

CPC分类号： G09G3/3685 ,  G09G2310/027 ,  G09G2330/06 ,  H04L25/0272 ,  H04L25/4902

摘要： In the process of transferring a clock signal and a plurality of data signals which are in synchronization with the clock signal, a driving pulse width of a driver switch is feedback-controlled by a clock transmission system (12), whereby the clock signal is transmitted at a small amplitude. A control signal having the pulse width is used for controlling the driver switch in each data transmission system (13), whereby transfer of each data signal at a small amplitude is realized at the same time. Further, in a clock reception system (10), the control signal having the pulse width is used in delay control of a clock delay circuit, whereby an optimum latch timing of received data in each data reception system (11) is realized.

摘要翻译： 在传送与时钟信号同步的时钟信号和多个数据信号的过程中，驱动器开关的驱动脉冲宽度由时钟传输系统（12）进行反馈控制，从而传输时钟信号 在一个小幅度。 具有脉冲宽度的控制信号用于控制每个数据传输系统（13）中的驱动器开关，从而同时实现以小幅度传送每个数据信号。 此外，在时钟接收系统（10）中，具有脉冲宽度的控制信号用于时钟延迟电路的延迟控制，从而实现每个数据接收系统（11）中的接收数据的最佳锁存定时。

公开(公告)号：US07466166B2

公开(公告)日：2008-12-16

申请号：US11097341

申请日：2005-04-04

申请人： Yoshito Date ,  Akira Matsuzawa

发明人： Yoshito Date ,  Akira Matsuzawa

IPC分类号： H03B1/00 ,  H03K3/00

CPC分类号： G09G3/3283 ,  G09G2310/027 ,  G09G2320/0233 ,  G09G2320/0693 ,  H03M1/1057 ,  H03M1/742

摘要： A current driver generates an output current according to an input signal. The current driver includes R current copy circuits and an output current generator where R is a natural number. Each of the current copy circuits stores a current having a given current value and input from the outside in a storage mode and outputs the stored current in an output mode. The output current generator obtains a current or the sum of currents from a non-negative integer number of the current copy circuits selected in accordance with the input signal, and thereby generates an output current.

摘要翻译： 电流驱动器根据输入信号产生输出电流。 电流驱动器包括R电流复制电路和输出电流发生器，其中R是自然数。 每个当前复制电路存储具有给定电流值并在存储模式下从外部输入的电流，并以输出模式输出所存储的电流。 输出电流发生器从根据输入信号选择的当前复制电路的非负整数获得电流或电流之和，从而产生输出电流。

公开(公告)号：US07084852B2

公开(公告)日：2006-08-01

申请号：US10385433

申请日：2003-03-12

申请人： Kazuyoshi Nishi ,  Yoshito Date

发明人： Kazuyoshi Nishi ,  Yoshito Date

IPC分类号： G09G3/36

CPC分类号： G09G3/3614 ,  G09G3/2011 ,  G09G3/3688 ,  G09G2310/0248 ,  G09G2330/021 ,  G09G2330/023

摘要： A switching-controlling section turns ON one of a transfer gate for high voltages or a transfer gate for low voltages and subsequently turns ON the other one of the transfer gates according to the outputs from the data latches only when the outputs from data latches are different from each other. Source lines are sequentially connected to a capacitor element for high voltages or a capacitor element for low voltages. For those source lines in which applied voltages change in a previous period and a subsequent period, an electric charge is stored and supplied effectively and power consumption is reduced, whereas for those source lines in which the applied voltages do not change, retained voltages do not vary so power is not consumed when subsequent voltages are applied. Power consumption in a liquid crystal panel driving device is reduced, and the time required for storing and supplying an electric charge is shortened. The circuit scale is also reduced.

公开(公告)号：US20060066602A1

公开(公告)日：2006-03-30

申请号：US11193537

申请日：2005-08-01

申请人： Yoshito Date

发明人： Yoshito Date

IPC分类号： G09G5/00

CPC分类号： G09G3/3688 ,  G09G3/3614 ,  G09G3/3696 ,  G09G2310/027 ,  G09G2320/0276

摘要： The grayscale voltage generation device includes a first line, a second line and a plurality of serial digital analog converters (DACs). A first reference voltage having a first voltage value is supplied to the first line, and a second reference voltage having a second voltage value is supplied to the second line. Each of the plurality of serial DACs receives grayscale information representing a grayscale level and generates a grayscale voltage having a voltage value corresponding to the grayscale information using the reference voltages supplied to the first and second lines.

公开(公告)号：US06958742B2

公开(公告)日：2005-10-25

申请号：US10795390

申请日：2004-03-09

申请人： Yoshito Date ,  Tetsuro Omori ,  Makoto Mizuki

发明人： Yoshito Date ,  Tetsuro Omori ,  Makoto Mizuki

IPC分类号： H01L51/50 ,  G05F3/26 ,  G09G3/20 ,  G09G3/30 ,  G09G3/32 ,  H03F3/343 ,  G09G3/36

CPC分类号： G09G3/3283 ,  G05F3/262 ,  G09G3/3241 ,  G09G2310/027 ,  G09G2320/0209

摘要： In a current drive system for current-driving a display panel such as an organic EL panel, display crosstalk caused by a bias-voltage variation due to induction from the display panel is prevented. For this prevention, the current drive system includes: a plurality of drivers for current-driving a plurality of display element circuits in the display panel; and a bias circuit with a low output impedance for generating a bias voltage and supplying the bias voltage to each of the drivers through a bias line. The output impedance of the bias circuit is set sufficiently low so that a voltage variation caused on the bias line due to switching operation of each switch in the drivers converges within a period during which display data is written.

摘要翻译： 在用于电流驱动诸如有机EL面板的显示面板的电流驱动系统中，防止由于从显示面板的感应而产生的偏置电压变化引起的显示串扰。 为了防止这种情况，当前的驱动系统包括：用于在显示面板中电流驱动多个显示元件电路的多个驱动器; 以及具有低输出阻抗的偏置电路，用于产生偏置电压，并通过偏置线将偏置电压提供给每个驱动器。 偏置电路的输出阻抗被设置得足够低，使得由于驱动器中的每个开关的切换操作而在偏置线上引起的电压变化在写入显示数据的时段内收敛。

公开(公告)号：US07605830B2

公开(公告)日：2009-10-20

申请号：US11193537

申请日：2005-08-01

申请人： Yoshito Date

发明人： Yoshito Date

IPC分类号： G09G5/10

CPC分类号： G09G3/3688 ,  G09G3/3614 ,  G09G3/3696 ,  G09G2310/027 ,  G09G2320/0276

摘要： The grayscale voltage generation device includes a first line, a second line and a plurality of serial digital analog converters (DACs). A first reference voltage having a first voltage value is supplied to the first line, and a second reference voltage having a second voltage value is supplied to the second line. Each of the plurality of serial DACs receives grayscale information representing a grayscale level and generates a grayscale voltage having a voltage value corresponding to the grayscale information using the reference voltages supplied to the first and second lines.

摘要翻译： 灰度级电压产生装置包括第一线，第二线和多个串行数字模拟转换器（DAC）。 具有第一电压值的第一参考电压被提供给第一线，并且具有第二电压值的第二参考电压被提供给第二线。 多个串行DAC中的每一个接收表示灰度级的灰度信息，并且使用提供给第一和第二行的参考电压产生具有与灰度信息相对应的电压值的灰度电压。

公开(公告)号：US07289087B2

公开(公告)日：2007-10-30

申请号：US10817810

申请日：2004-04-06

申请人： Yoshito Date

发明人： Yoshito Date

IPC分类号： G09G3/30

CPC分类号： G09G3/3283 ,  G09G2310/027 ,  G09G2320/0276

摘要： A current driver to which image data including a plurality of grayscale values is input and which outputs an electric current according to the grayscale values of the image data, the current driver comprising: a first input section to which a first reference current is input, a current value of the first reference current being changed according to the grayscale values of the image data; a second input section to which a second reference current is input, the second reference current having a current value different from that of the first reference current; and a current divider circuit which uses the second reference current and the first reference current to output an electric current, the electric current having a value equal to or higher than that of the first reference current and equal to or lower than that of the second reference current.

摘要翻译： 输入包括多个灰阶值的图像数据并根据图像数据的灰度值输出电流的当前驱动器，所述当前驱动器包括：输入第一参考电流的第一输入部分， 第一参考电流的当前值根据图像数据的灰度值而改变; 输入第二参考电流的第二输入部分，所述第二参考电流具有与所述第一参考电流的电流值不同的电流值; 以及分流器电路，其使用所述第二参考电流和所述第一参考电流来输出电流，所述电流具有等于或高于所述第一参考电流的电流并且等于或低于所述第二参考电流的电流 当前。