HARDWARE TO PERFORM SQUARING
    10.
    发明公开

    公开(公告)号:US20240134607A1

    公开(公告)日:2024-04-25

    申请号:US18240387

    申请日:2023-08-31

    IPC分类号: G06F7/552 G06F7/40

    CPC分类号: G06F7/5525 G06F7/405

    摘要: Methods of calculating a square of an input number in hardware logic are described. An m-bit number is received and Booth encoding is performed on different groups of three consecutive bits selected from the input to generate an encoded value for each of the groups. For each group, the method comprises forming a truncated string from the input number, generating an updated version of the truncated number and selecting a bit string based on the encoded value, the selected bit string comprising zeros or a left-shifted version of the updated version of the truncated number sign extended to a bit-width of 2m bits. The method further comprises combining the selected bit strings and square and sign bits for each group into an addition array; and summing the bits in the addition array.