Method and device for estimating the relative drift between two clocks, in particular for ranging applications in UWB-LDR technology
    91.
    发明授权
    Method and device for estimating the relative drift between two clocks, in particular for ranging applications in UWB-LDR technology 有权
    用于估计两个时钟之间的相对漂移的方法和装置,特别是用于UWB-LDR技术中的测距应用

    公开(公告)号:US07916818B2

    公开(公告)日:2011-03-29

    申请号:US11850934

    申请日:2007-09-06

    Applicant: Armin Wellig

    Inventor: Armin Wellig

    CPC classification number: H04B1/7183 H03M13/29 H04J3/0658 H04L7/0066

    Abstract: A method is for estimating drift between a first clock used in a digital transmission processing of a first Ultra Wide Band (UWB) pulse train signal and a second clock used in a digital reception processing of a second UWB pulse train signal resulting from a transmission of the first UWB pulse train signal. The method may include sampling the second UWB pulse train signal, and calculating trellis information representative of a trellis having reference paths respectively associated to different reference values of the drift and including sample transitions of a sampled third signal from the sampled second UWB pulse train signal. The method may further include processing the sampled third signal along the trellis for obtaining a path metric for each processed reference path, and selecting the processed reference path having a greatest path metric, the drift being the reference value associated to the selected processed reference path.

    Abstract translation: 一种用于估计在第一超宽带(UWB)脉冲串信号的数字传输处理中使用的第一时钟与在第二UWB脉冲串信号的传输的第二UWB脉冲串信号的数字接收处理中使用的第二时钟之间的漂移的方法 第一个UWB脉冲串信号。 该方法可以包括对第二UWB脉冲串信号进行采样,以及计算代表具有分别与漂移的不同参考值相关联的参考路径的网格的格状信息,并且包括来自采样的第二UWB脉冲串信号的采样第三信号的采样转换。 该方法还可以包括沿着网格处理采样的第三信号,以获得每个处理的参考路径的路径度量,以及选择具有最大路径量度的经处理参考路径,该漂移是与所选择的处理参考路径相关联的参考值。

    METHOD FOR WRITING AND READING DATA IN AN ELECTRICALLY ERASABLE AND PROGRAMMABLE NONVOLATILE MEMORY
    93.
    发明申请
    METHOD FOR WRITING AND READING DATA IN AN ELECTRICALLY ERASABLE AND PROGRAMMABLE NONVOLATILE MEMORY 有权
    在电可擦除和可编程非易失性存储器中写入和读取数据的方法

    公开(公告)号:US20100106896A1

    公开(公告)日:2010-04-29

    申请号:US12604175

    申请日:2009-10-22

    Abstract: A method for writing and reading data in a main nonvolatile memory having target pages in which data are to be written and read, the method including providing a nonvolatile buffer having an erased area, providing a volatile cache memory, and receiving a write command to update a target page with updating data the length of which can be lower than the length of a page. The method also includes, in response to the write command, writing the updating data into the erased area of the nonvolatile buffer, together with management data of a first type, and recording an updated version of the target page in the cache memory or updating in the cache memory a previously updated version of the target page.

    Abstract translation: 一种用于在具有要写入和读取数据的目标页面的主非易失性存储器中写入和读取数据的方法,所述方法包括提供具有擦除区域的非易失性缓冲器,提供易失性高速缓冲存储器,以及接收写入命令以更新 具有更新数据的目标页面,其长度可以低于页面的长度。 该方法还包括响应于写入命令,将更新数据与第一类型的管理数据一起写入到非易失性缓冲器的擦除区域中,并将目标页面的更新版本记录在高速缓冲存储器中或更新 缓存存储器是目标页面的先前更新版本。

    TFA image sensor with stability-optimized photodiode
    94.
    发明授权
    TFA image sensor with stability-optimized photodiode 有权
    具有稳定性优化光电二极管的TFA图像传感器

    公开(公告)号:US07701023B2

    公开(公告)日:2010-04-20

    申请号:US11875460

    申请日:2007-10-19

    CPC classification number: H01L31/1055 H01L27/14665

    Abstract: A TFA (thin film on ASIC) image sensor with stability-optimized photodiode for converting electromagnetic radiation into an intensity-dependent photocurrent. The TFA includes an intermetal dielectric layer, pixel back electrodes, vias, metal contacts, a transparent conductive oxide (TCO) layer, and an intrinsic absorption layer with a thickness between 300 nm and 600 nm. The pixel back electrodes are disposed over the intermetal dielectric layer, which is disposed over the ASIC. The vias connect to the pixel back electrodes and the metal contacts, which are formed in the intermetal dielectric layer. The TCO is disposed above the intrinsic absorption layer, which is disposed above the pixel back electrodes.

    Abstract translation: 具有稳定性优化的光电二极管的TFA(ASIC上的薄膜)图像传感器,用于将电磁辐射转换为强度依赖的光电流。 TFA包括金属间介电层,像素背电极,通孔,金属接触,透明导电氧化物(TCO)层和厚度在300nm和600nm之间的本征吸收层。 像素背电极设置在设置在ASIC上方的金属间电介质层之上。 通孔连接到形成在金属间电介质层中的像素背电极和金属触点。 TCO设置在本征吸收层的上方,其设置在像素背电极之上。

    Method and device for decoding packets of data within a hybrid ARQ scheme
    96.
    发明授权
    Method and device for decoding packets of data within a hybrid ARQ scheme 有权
    用于解码混合ARQ方案中的数据分组的方法和装置

    公开(公告)号:US07600172B2

    公开(公告)日:2009-10-06

    申请号:US11293460

    申请日:2005-12-02

    Abstract: A device for decoding an incident FEC encoded packet of data within an ARQ scheme. The device includes a processor or processing means for performing successive decoding processes of successive intermediate FEC code encoded packets related to the incident FEC code encoded packet. The processor or processing means includes a FEC decoder. The processor or processing means included a determination unit or determination means for determining initial decoding conditions from the FEC code decoding result concerning the preceding intermediate FEC code encoded packet and from the current intermediate FEC code encoded packet, and the FEC decoder is for performing the current FEC code decoding using the initial decoding conditions.

    Abstract translation: 一种用于解码ARQ方案内的数据的入局FEC编码分组的装置。 该装置包括处理器或处理装置,用于执行与入射的FEC码编码包有关的连续中间FEC码编码包的连续解码处理。 处理器或处理装置包括FEC解码器。 处理器或处理装置包括:确定单元或确定装置,用于根据与前述中间FEC编码分组以及当前中间FEC编码分组相关的FEC码解码结果确定初始解码条件,并且FEC解码器用于执行当前 FEC码解码使用初始解码条件。

    METHOD AND DEVICE FOR DOWNCONVERTING THE SAMPLING FREQUENCY OF A DIGITAL SIGNAL, FOR EXAMPLE IN A NON-INTEGER FREQUENCY RATIO
    97.
    发明申请
    METHOD AND DEVICE FOR DOWNCONVERTING THE SAMPLING FREQUENCY OF A DIGITAL SIGNAL, FOR EXAMPLE IN A NON-INTEGER FREQUENCY RATIO 有权
    用于将数字信号的采样频率用于非整数频率比例的方法和装置

    公开(公告)号:US20090207959A1

    公开(公告)日:2009-08-20

    申请号:US12372258

    申请日:2009-02-17

    CPC classification number: H03H17/0642 H03H2218/10

    Abstract: A method for converting a sampling frequency of a digital signal sampled at a first sampling frequency includes receiving digital signal input samples, and forming output samples corresponding to a second sampling frequency based on the digital signal input samples and an interpolation filter. The first sampling frequency may be larger than the second sampling frequency. The method may further include delivering the output samples. Forming output samples includes, for each of the digital signal input samples, updating current values of N successive output samples with N contributions. The N contributions may be respectively calculated based on a value of a current input sample of the digital input samples weighted by values of N filter coefficients associated with the current input sample, N being fixed and identical for all the digital signal input samples regardless of a value of the conversion ratio between the first and second sampling frequencies.

    Abstract translation: 用于转换以第一采样频率采样的数字信号的采样频率的方法包括接收数字信号输入采样,并且基于数字信号输入采样和内插滤波器形成对应于第二采样频率的输出采样。 第一采样频率可以大于第二采样频率。 该方法还可以包括递送输出样本。 对于每个数字信号输入样本,形成输出样本包括以N个贡献更新N个连续输出样本的当前值。 可以基于由与当前输入样本相关联的N个滤波器系数的值加权的数字输入样本的当前输入样本的值分别计算N个贡献,N对于所有数字信号输入样本是固定的和相同的,而不管 第一和第二采样频率之间的转换比值。

    METHOD FOR DETECTING THE EVETUAL PRESENCE OF AN INTERFERER, FOR EXAMPLE A RADAR SIGNAL, ADAPTED TO INTERFERE WITH A WIRELESS DEVICE, FOR EXAMPLE A UWB DEVICE, AND CORRESPONDING DEVICE
    98.
    发明申请
    METHOD FOR DETECTING THE EVETUAL PRESENCE OF AN INTERFERER, FOR EXAMPLE A RADAR SIGNAL, ADAPTED TO INTERFERE WITH A WIRELESS DEVICE, FOR EXAMPLE A UWB DEVICE, AND CORRESPONDING DEVICE 有权
    用于检测干扰器的实际存在的方法,例如适用于无线设备的干扰信号的雷达信号,用于实施例A的UWB设备和相应的设备

    公开(公告)号:US20090036084A1

    公开(公告)日:2009-02-05

    申请号:US12145610

    申请日:2008-06-25

    CPC classification number: H04B1/1027 H04B1/719

    Abstract: The method is for detecting the eventual presence of an interferer that is adapted to interfere with a wireless device. The wireless device is provided with at least one receiving chain including an analog to digital conversion stage. The method includes receiving on the receiving chain an incident signal, and delivering to the ADC stage an analog signal from the incident signal. The method further includes elaborating or determining a binary information from a binary signal delivered by the ADC stage and representative of the level of the analog signal, analyzing a temporal evolution of the binary information and detecting the presence of the interferer from the analysis.

    Abstract translation: 该方法用于检测适于干扰无线设备的干扰源的最终存在。 无线设备设置有至少一个包括模数转换级的接收链。 该方法包括在接收链上接收入射信号,并将来自入射信号的模拟信号传送到ADC级。 该方法还包括从ADC级传送的二进制信号中拟合或确定二进制信息,并代表模拟信号的电平,分析二进制信息的时间演变并从分析中检测干扰源的存在。

    Electronic device for reducing interleaving write access conflicts in optimized concurrent interleaving architecture for high throughput turbo decoding
    99.
    发明授权
    Electronic device for reducing interleaving write access conflicts in optimized concurrent interleaving architecture for high throughput turbo decoding 有权
    用于减少交织写入访问冲突的电子设备,用于高吞吐量turbo解码的优化并发交织架构

    公开(公告)号:US07386691B2

    公开(公告)日:2008-06-10

    申请号:US11104836

    申请日:2005-04-13

    CPC classification number: H03M13/6566 H03M13/2771

    Abstract: An electronic device may include a source memory device partitioned into N elementary source memories for storing a sequence of input data sets, and a processor clocked by a clock signal and having N outputs for producing, per cycle of the clock signal, N output data sets respectively associated with the N input data sets stored in the N elementary source memories at respective source addresses. The electronic device may also include N single port target memories, N interleaving tables including, for each relative source address, the number of a target memory and the respective target address thereof, N cells connected in a ring structure. Further, each cell may also be connected between an output of the processor, an interleaving table, and a target memory.

    Abstract translation: 电子设备可以包括分为N个基本源存储器的源存储器件,用于存储一系列输入数据组,以及由时钟信号计时并具有N个输出的处理器,用于每个周期的时钟信号产生N个输出数据组 分别与存储在各个源地址中的N个基本源存储器中的N个输入数据集相关联。 电子设备还可以包括N个单端口目标存储器,N个交织表包括用于每个相对源地址的目标存储器的数量及其各自的目标地址,以环形结构连接的N个单元。 此外,每个单元还可以连接在处理器的输出,交织表和目标存储器之间。

    Method and apparatus for RF common-mode noise rejection in a DSL receiver
    100.
    再颁专利
    Method and apparatus for RF common-mode noise rejection in a DSL receiver 有权
    用于DSL接收机中RF共模噪声抑制的方法和装置

    公开(公告)号:USRE40149E1

    公开(公告)日:2008-03-11

    申请号:US10956017

    申请日:2004-09-30

    Inventor: Roman Vitenberg

    Abstract: A receiver for high-speed data communications, which receives a differential signal through a pair of signal lines. The receiver includes a common-mode choke, which has first and second signal windings, which are respectively coupled in series to the pair of signal lines so as to attenuate common-mode interference in the differential signal. The choke also has a sampling winding, which is inductively coupled to the signal windings so as to generate a sampled signal responsive to current flowing in the signal windings. Signal processing circuitry is coupled to receive the sampled signal from the sampling winding and to receive the differential signal from the signal windings and to process the differential signal responsive to the sampled signal.

    Abstract translation: 用于高速数据通信的接收机,其通过一对信号线接收差分信号。 接收机包括共模扼流圈,它具有第一和第二信号绕组,它们分别与该对信号线串联耦合,以便衰减差分信号中的共模干扰。 扼流圈还具有采样绕组,其被感应耦合到信号绕组,以便响应于在信号绕组中流动的电流产生采样信号。 信号处理电路被耦合以从采样绕组接收采样信号,并从信号绕组接收差分信号,并根据采样信号处理差分信号。

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