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公开(公告)号：US11150682B2
公开(公告)日：2021-10-19
申请号：US17085493
申请日：2020-10-30
Applicant: STMICROELECTRONICS (TOURS) SAS
Inventor： Kuno Lenz
Abstract: In an embodiment, a device for generating a first current from a second current, comprises: an output transistor configured to generate the first current; a first circuit configured to generate a third current representative of the second current and to draw it from a first node; a second circuit configured to generate a fourth current representative of the first current and to supply it to the first node; and a third circuit receiving a fifth current representative of a difference between the third and fourth currents, the third circuit being configured to generate a sixth current representative of the fifth current and to draw it from a control terminal of the output transistor.
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公开(公告)号：US20210135590A1
公开(公告)日：2021-05-06
申请号：US17071193
申请日：2020-10-15
Applicant: STMicroelectronics (Tours) SAS
Inventor： Yannick HAGUE , Romain LAUNOIS
IPC: H02M7/162
Abstract: A circuit includes two input nodes and two output nodes. A rectifier bridge is coupled to the input and output nodes. The rectifier bridge includes a first and second thyristors and a third thyristor coupled in series with a resistor in series. The series coupled third thyristor and resistor are coupled in parallel with one of the first and second thyristors. The first and second thyristors are controlled off, with the third thyristor controlled on, during start up with resistor functioning as an in in-rush current limiter circuit. In normal rectifying operation mode, the first and second thyristors are controlled on, with the third thyristor controlled off.
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公开(公告)号：US20200321330A1
公开(公告)日：2020-10-08
申请号：US16834329
申请日：2020-03-30
Applicant: STMicroelectronics (Tours) SAS
Inventor： Eric LACONDE , Olivier ORY
IPC: H01L27/02 , H01L29/87 , H01L29/866
Abstract: A semiconductor substrate of a first conductivity type is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is formed an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are provided in the semiconductor layer. A second region of the second conductivity type is formed in the first well. A third region of the second conductivity type is formed in the second well. The first well, the semiconducting layer, the second well and the third region form a first lateral thyristor. The second well, the semiconductor layer, the first well and the second region form a second lateral thyristor. The buried region and semiconductor substrate form a zener diode which sets the trigger voltage for the lateral thyristors.
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公开(公告)号：US10797290B2
公开(公告)日：2020-10-06
申请号：US15440683
申请日：2017-02-23
Applicant: STMicroelectronics (Tours) SAS
Inventor： Mohamed Boufnichel , Julien Ladroue
Abstract: Identical planar electronic components are stacked in an assembly. Each component has two contact metallizations positioned on edges of a same surface of the component. The components are stacked along a common axis. Each successive component is rotated about the common axis by a fixed angle. A value of the fixed angle is selected to position, side by side, the contact metallization of one component and the contact metallization of another next component adjacent to each other in the stack. Electrical connections are provided between two adjacent contact metallizations.
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公开(公告)号：US10608551B2
公开(公告)日：2020-03-31
申请号：US16052177
申请日：2018-08-01
Applicant: STMicroelectronics (Tours) SAS
Inventor： Frederic Gautier
Abstract: A rectifying element includes a MOS transistor series-connected with a Schottky diode. A bias voltage is applied between the control terminal of the MOS transistor and the terminal of the Schottky diode opposite to the transistor. A pair of the rectifying elements are substituted for diodes of a rectifying bridge circuit. Alternatively, the control terminal bias is supplied from a cross-coupling against the Schottky diodes. In another implementation, the Schottky diodes are omitted and the bias voltage applied to control terminals of the MOS transistors is switched in response to cross-coupled divided source-drain voltages of the MOS transistors. The circuits form components of a power converter.
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Patent Agency Ranking
公开(公告)号：US10522796B2
公开(公告)日：2019-12-31
申请号：US15699233
申请日：2017-09-08
Applicant: STMicroelectronics (Tours) SAS
Inventor： Julien Ladroue , Mohamed Boufnichel
IPC: H01M2/06 , H01M2/02 , H01M10/058 , H01M2/20 , H01M2/30 , H01M10/04 , H01M10/0525
Abstract: A battery structure has structure anode and cathode contacts on a front face and on a rear face. The battery structure includes a battery having battery anode and cathode contacts only on a front face thereof. A film including a conductive layer and an insulating layer jackets the battery. The conductive layer extends over the battery anode and cathode contacts and is interrupted therebetween. Openings are provided in the insulating layer on the front and rear faces of the battery structure to form the structure anode and cathode contacts of the battery structure.
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公开(公告)号：US10483874B2
公开(公告)日：2019-11-19
申请号：US16020431
申请日：2018-06-27
Applicant: STMicroelectronics (Tours) SAS
Inventor： Ghafour Benabdelaziz , Cedric Reymond , David Jouve
Abstract: A reversible converter includes a first field effect transistor and a second field effect transistor coupled in series between a first terminal and a second terminal for a DC voltage. A first thyristor and a second thyristor are coupled in series between the first and second terminals for the DC voltage. A third thyristor and a fourth thyristor are also coupled in series between the first and second terminals for the DC voltage terminals, but have an opposite connection polarity with respect to the first and second thyristors. A midpoint of connection between the first and second field effect transistors and a common midpoint of connection between the first and second thyristors and the third and fourth thyristors are coupled to AC voltage terminals. Actuation of the transistors and thyristors is controlled in distinct manners to operate the converter in an AC-DC conversion mode and a DC-AC conversion mode.
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公开(公告)号：US20190326276A1
公开(公告)日：2019-10-24
申请号：US16388191
申请日：2019-04-18
Applicant: STMicroelectronics (Tours) SAS
Inventor： Mathieu ROUVIERE
IPC: H01L27/02 , H01L29/866
Abstract: An electrostatic discharge protection circuit includes a diode bridge in parallel with a thyristor and a first avalanche diode. The diode bridge is coupled between first and second nodes. The thyristor has an anode coupled to the first node and a cathode coupled to the second node. The first avalanche diode has a cathode coupled to the first node and an anode coupled to the second node. A second avalanche diode has a cathode coupled to the first node and an anode coupled to a gate of the thyristor. When an electrostatic discharge occurs, current flows through the diode bridge, into the first node, and is first dissipated by the avalanche diode and is thereafter also dissipated by the thyristor once the thyristor turns on.
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公开(公告)号：US20190296545A1
公开(公告)日：2019-09-26
申请号：US16358964
申请日：2019-03-20
Applicant: STMicroelectronics (Tours) SAS
Inventor： Mathieu ROUVIERE
Abstract: A circuit for protecting against electrostatic discharges includes two avalanche circuit components having different turn-on delays with respect to a beginning of an electrostatic discharge. The two avalanche circuit components are coupled in parallel. The avalanche circuit component closer to an output node has a turn-on delay on the order of 30 ns, while the avalanche circuit component closer to an input node has a turn-on delay on the order of 1 ns.
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公开(公告)号：US10403963B2
公开(公告)日：2019-09-03
申请号：US15691285
申请日：2017-08-30
Applicant: STMICROELECTRONICS (TOURS) SAS
Inventor： Benoit Bonnet
Abstract: The invention relates to an antenna comprising: an elongate conducting band; an antenna socket; a connection to earth; at least one first capacitive element of adjustable capacitance; and at least one first inductive element in series with the first capacitive element.
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