Stacked multiple electronic component interconnect structure
    91.
    发明授权
    Stacked multiple electronic component interconnect structure 失效
    堆叠多个电子元件互连结构

    公开(公告)号:US07438557B1

    公开(公告)日:2008-10-21

    申请号:US11938858

    申请日:2007-11-13

    CPC classification number: H01R13/22 Y10T29/49002

    Abstract: A stacked multiple electronic component interconnect structure includes a connector portion having a first and second connector surfaces. A first double sided land grid array having a first surface provided with a first plurality of connector units and a second surface provided with a second plurality of connector units, is positioned on the first connector surface. A second double sided land grid array having a first surface provided with a first plurality of connector units and a second surface provided with a second plurality of connector units is positioned on the second connector surface. A first electronic component is mounted to the second surface of the first land grid array and a second electronic component is mounted to the second surface of the second land grid array to form a stacked multiple electronic component interconnect structure that conserves space on an electronic board.

    Abstract translation: 堆叠的多个电子部件互连结构包括具有第一和第二连接器表面的连接器部分。 具有设置有第一多个连接器单元的第一表面和设置有第二多个连接器单元的第二表面的第一双面接地栅格阵列被定位在第一连接器表面上。 具有设置有第一多个连接器单元的第一表面和设置有第二多个连接器单元的第二表面的第二双面接地栅格阵列定位在第二连接器表面上。 第一电子部件被安装到第一焊盘格栅阵列的第二表面,并且第二电子部件被安装到第二焊盘格栅阵列的第二表面以形成堆叠的多个电子部件互连结构,其节省电子板上的空间。

    Method and an apparatus for managing power consumption of a server
    93.
    发明授权
    Method and an apparatus for managing power consumption of a server 有权
    用于管理服务器的功耗的方法和装置

    公开(公告)号:US07418608B2

    公开(公告)日:2008-08-26

    申请号:US10871587

    申请日:2004-06-17

    Abstract: A method and an apparatus for managing power consumption of a server have been disclosed. In one embodiment, the method includes allowing a user to set a power management policy on a server, monitoring power consumption of a plurality of blades in the server, and automatically managing power consumption of the server in response to the power consumption of the plurality of blades based on the power management policy set by the user. Other embodiments have been claimed and described.

    Abstract translation: 已经公开了一种用于管理服务器的功耗的方法和装置。 在一个实施例中,该方法包括允许用户在服务器上设置电源管理策略,监视服务器中的多个刀片的功耗,以及响应于多个服务器的功耗而自动管理服务器的功耗 基于用户设置的电源管理策略。 已经要求和描述了其它实施例。

    Compact SRAMs and other multiple transistor structures
    95.
    发明授权
    Compact SRAMs and other multiple transistor structures 有权
    紧凑型SRAM和其他多晶体管结构

    公开(公告)号:US07365398B2

    公开(公告)日:2008-04-29

    申请号:US11055014

    申请日:2005-02-11

    CPC classification number: H01L27/1104 H01L27/11

    Abstract: A highly dense form of static random-access memory (SRAM) takes advantage of transistor gates on both sides of silicon and high interconnectivity made possible by the complex form of silicon-on-insulator and three-dimensional integration. This technology allows one to form p-channel and n-channel devices very compactly by taking advantage of placement of gates on both sides, making common contacts and dense interconnections in 3D.

    Abstract translation: 高密度形式的静态随机存取存储器(SRAM)利用了硅两面的晶体管栅极和通过绝缘体上硅和三维集成的复杂形式实现的高互连性。 这种技术允许通过利用两侧的门的放置,在3D中形成常见的接触和密集的互连,从而非常紧凑地形成p沟道和n沟道器件。

    Internet based network topology discovery
    96.
    发明申请
    Internet based network topology discovery 审中-公开
    基于互联网的网络拓扑发现

    公开(公告)号:US20070294409A1

    公开(公告)日:2007-12-20

    申请号:US11893868

    申请日:2007-08-17

    Applicant: Arvind Kumar

    Inventor: Arvind Kumar

    CPC classification number: H04L41/12 H04L41/0266

    Abstract: A system and method are provided for internet-based network topology discovery. A server in communication with a client, the server having a console having a managing device is provided to manage one or more network devices. A search engine is provided that is in communication with the managing device via a network including the Internet, the search engine capable of being accessed via the client. The console is used to formulate an Extensible Markup Language (XML) discovery information query, wherein the XML discovery information query is initiated automatically by the client. The console is further to send the XML discovery information query to the search engine to facilitate searching of discovery information relevant to the one or more network devices, wherein at least one of the one or more network devices includes an XML discovery information file, wherein at least one of the one or more network devices does not include the XML discovery information file. In response to sending the XML discovery information query, the console to receive one or more of the following via the search engine: first discovery information from the one or more network devices having the XML discovery information file, and second discovery information from a proxy device for the one or more network devices not including the XML discovery information files. The console is further used to generate a network topology map for the one or more network devices via the retrieved first and second discovery information.

    Abstract translation: 提供了一种基于互联网的网络拓扑发现的系统和方法。 提供与客户端通信的服务器,具有控制台的服务器具有管理设备以管理一个或多个网络设备。 提供了一种搜索引擎,其经由包括因特网的网络与管理设备通信,该搜索引擎能够经由客户机访问。 控制台用于制定可扩展标记语言(XML)发现信息查询,其中XML发现信息查询由客户端自动启动。 所述控制台还将所述XML发现信息查询发送到所述搜索引擎,以便于搜索与所述一个或多个网络设备相关的发现信息,其中所述一个或多个网络设备中的至少一个包括XML发现信息文件,其中, 一个或多个网络设备中的至少一个不包括XML发现信息文件。 响应于发送XML发现信息查询,控制台通过搜索引擎接收以下一个或多个:具有XML发现信息文件的一个或多个网络设备的第一发现信息和来自代理设备的第二发现信息 对于不包括XML发现信息文件的一个或多个网络设备。 控制台还用于通过检索的第一和第二发现信息为一个或多个网络设备生成网络拓扑图。

    Substrate solution for back gate controlled SRAM with coexisting logic devices
    97.
    发明申请
    Substrate solution for back gate controlled SRAM with coexisting logic devices 有权
    用于具有共存逻辑器件的背栅控制SRAM的衬底解决方案

    公开(公告)号:US20070138533A1

    公开(公告)日:2007-06-21

    申请号:US11311462

    申请日:2005-12-19

    CPC classification number: H01L27/1108

    Abstract: A semiconductor structure that includes at least one logic device region and at least one static random access memory (SRAM) device region wherein each device region includes a double gated field effect transistor (FET) wherein the back gate of each of the FET devices is doped to a specific level so as to improve the performance of the FET devices within the different device regions is provided. In particular, the back gate within the SRAM device region is more heavily doped than the back gate within the logic device region. In order to control short channel effects, the FET device within the logic device region includes a doped channel, while the FET device within the SRAM device region does not. A none uniform lateral doping profile with a low net doping beneath the source/drain regions and a high net doping underneath the channel would provide additional SCE control for the logic device

    Abstract translation: 一种半导体结构,其包括至少一个逻辑器件区域和至少一个静态随机存取存储器(SRAM)器件区域,其中每个器件区域包括双门控场效应晶体管(FET),其中每个FET器件的背栅极掺杂 提供了特定的水平,以提高不同器件区域内的FET器件的性能。 特别地,SRAM器件区域内的背栅极比逻辑器件区域内的后栅极重掺杂。 为了控制短沟道效应,逻辑器件区域内的FET器件包括掺杂沟道,而SRAM器件区域内的FET器件不是。 在源极/漏极区域之下具有低净掺杂的无均匀横向掺杂分布以及在沟道下方的高净掺杂将为逻辑器件提供附加的SCE控制

    Venting device for tamper resistant electronic modules
    98.
    发明授权
    Venting device for tamper resistant electronic modules 失效
    防篡改电子模块通风装置

    公开(公告)号:US07214874B2

    公开(公告)日:2007-05-08

    申请号:US10981021

    申请日:2004-11-04

    Abstract: A tamper resistant enclosure for an electronic circuit includes an inner copper case, a tamper sensing mesh wrapped around the inner case, an outer copper case enclosing the inner case and the tamper sensing mesh, and a venting device forming a vent channel from inside the inner case to outside the outer case, the vent channel passing between overlapping layers of the tamper sensing mesh and having at least one right angle bend along its length. The venting device includes two strips of a thin polyamide coverlay material laminated together along their length, and a length of wool yarn sandwiched between the two thin strips and extending from one end of the strips to the other end of the strips to form the vent channel. The length of yarn follows a zig-zag path between the first and second strips, the zig-zag path including at least one right angle bend.

    Abstract translation: 用于电子电路的防篡改外壳包括内铜壳,围绕内壳缠绕的篡改感测网,包围内壳和篡改感测网的外铜壳,以及从内部内部形成通风通道的排气装置 壳体到外壳外部,排气通道在篡改感测网的重叠层之间通过,并且沿其长度具有至少一个直角弯曲。 排气装置包括沿其长度层叠在一起的两条薄的聚酰胺覆盖层材料,以及夹在两条薄条之间的长度的羊毛,并且从带的一端延伸到带的另一端以形成排气通道 。 纱线的长度遵循第一和第二条带之间的之字形路径,之字形路径包括至少一个直角弯曲部。

    Method and apparatus for mounting a heat transfer apparatus upon an electronic component
    100.
    发明授权
    Method and apparatus for mounting a heat transfer apparatus upon an electronic component 失效
    将传热装置安装在电子部件上的方法和装置

    公开(公告)号:US06988533B2

    公开(公告)日:2006-01-24

    申请号:US10607361

    申请日:2003-06-26

    CPC classification number: H01L23/4006 H01L2924/0002 H01L2924/00

    Abstract: A heat transfer apparatus comprises a thermally conductive member including a base having one or more surfaces adapted to absorb heat from an electronic component, and a mounting assembly including at least one mounting member directly coupled to the base and for direct attachment to the electronic component so that loading forces for mounting on it the electronic component are not directly applied to the base. The thermally conductive member is a graphite-based material. A compliant force applying mechanism is mounted generally on the base for controlling forces applied on the base.

    Abstract translation: 传热装置包括导热构件,其包括具有适于吸收来自电子部件的热量的一个或多个表面的底座和安装组件,该安装组件包括至少一个安装构件,该至少一个安装构件直接连接到基座并用于直接附接到电子部件,因此 用于安装在其上的电子部件的负载力不直接施加到基座。 导热构件是石墨基材料。 柔性力施加机构通常安装在基座上以控制施加在基座上的力。

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