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    Assignment Constraint Matrix for Assigning Work From Multiple Sources to Multiple Sinks
    91.
    发明申请
    Assignment Constraint Matrix for Assigning Work From Multiple Sources to Multiple Sinks 失效
    分配约束矩阵用于将工作从多个来源分配到多个接收器

    公开(公告)号：US20110158249A1

    公开(公告)日：2011-06-30

    申请号：US12650080

    申请日：2009-12-30

    Applicant: Claude Basso ,  Jean L. Calvignac ,  Chih-Jen Chang ,  Hubertus Franke ,  Fabrice J. Verplanken ,  Colin B. Verrilli

    Inventor： Claude Basso ,  Jean L. Calvignac ,  Chih-Jen Chang ,  Hubertus Franke ,  Fabrice J. Verplanken ,  Colin B. Verrilli

    IPC: H04L12/56

    CPC classification number: H04L49/9047

    Abstract: An assignment constraint matrix method and apparatus used in assigning work, such as data packets, from a plurality of sources, such as data queues in a network processing device, to a plurality of sinks, such as processor threads in the network processing device. The assignment constraint matrix is implemented as a plurality of qualifier matrixes adapted to operate simultaneously in parallel. Each of the plurality of qualifier matrixes is adapted to determine sources in a subset of supported sources that are qualified to provide work to a set of sinks based on assignment constraints. The determination of qualified sources may be based sink availability information that may be provided for a set of sinks on a single chip or distributed on multiple chips.

    Abstract translation: 一种分配约束矩阵方法和装置，用于从网络处理设备中的多个源（诸如网络处理设备中的数据队列）将诸如数据分组的工作分配给诸如网络处理设备中的处理器线程的多个接收器。 分配约束矩阵被实现为适于同时并行操作的多个限定符矩阵。 多个限定符矩阵中的每一个适于确定被支持的源的子集中的源，所述源被限定为基于分配约束向一组接收器提供工作。 合格来源的确定可以是可以在单个芯片上提供用于一组接收器或分布在多个芯片上的接收器可用性信息。

    MALWARE PREVENTION METHOD AND SYSTEM IN A PEER-TO-PEER ENVIRONMENT
    92.
    发明申请
    MALWARE PREVENTION METHOD AND SYSTEM IN A PEER-TO-PEER ENVIRONMENT 审中-公开
    恶意环境中的恶意预防方法和系统

    公开(公告)号：US20100263048A1

    公开(公告)日：2010-10-14

    申请号：US12422989

    申请日：2009-04-14

    Applicant: Chih-Jen Chang ,  Shih-Wei Chien

    Inventor： Chih-Jen Chang ,  Shih-Wei Chien

    IPC: G06F21/00 ,  G06F12/14 ,  G06F17/30

    CPC classification number: H04L63/145 ,  G06F21/566 ,  H04L67/104

    Abstract: A computer-implemented method and system for malware prevention in a peer-to-peer (P2P) environment are disclosed. Specifically, one implementation of the embodiment sets forth a method, which includes the operations of obtaining a meta information of a data, prior to initiating downloading of the data, sending the meta information to a server, and initiating downloading of the data after having received confirmation from the server that the meta information is free from being associated with any known malware.

    Abstract translation: 公开了一种用于在对等（P2P）环境中防恶意软件的计算机实现的方法和系统。 具体地，本实施例的一个实现方案提出了一种方法，其包括在开始下载数据之前获得数据的元信息的操作，向服务器发送元信息，以及在接收到数据之后开始数据的下载 从服务器确认元信息与任何已知的恶意软件无关。

    DISPLAY DEVICE, BACKLIGHT MODULE OF SUCH DISPLAY DEVICE, AND METHOD OF FIXING CIRCUIT BOARD ON SUCH BACKLIGHT MODULE
    93.
    发明申请
    DISPLAY DEVICE, BACKLIGHT MODULE OF SUCH DISPLAY DEVICE, AND METHOD OF FIXING CIRCUIT BOARD ON SUCH BACKLIGHT MODULE 有权
    显示装置，这种显示装置的背光模块以及在这种背光模块上固定电路板的方法

    公开(公告)号：US20090213574A1

    公开(公告)日：2009-08-27

    申请号：US12392213

    申请日：2009-02-25

    Applicant: Chih-Jen CHANG ,  Shun-Nan CHANG

    Inventor： Chih-Jen CHANG ,  Shun-Nan CHANG

    IPC: F21V17/00 ,  H05K5/02

    CPC classification number: G02B6/0085 ,  G02B6/0083 ,  H05K3/0058

    Abstract: A backlight module includes at least one light source, a lamp cover and a circuit board. The lamp cover has a containing portion and at least one projection. The containing portion is arranged for containing the light source. The projection is located at an outer side of the containing portion on which the circuit board is placed so that at least one fixing portion of the circuit board is in contact with the projection for constraining movements of the circuit board relative to the lamp cover.

    Abstract translation: 背光模块包括至少一个光源，灯罩和电路板。 灯罩具有容纳部分和至少一个突起。 容纳部被配置为容纳光源。 突出部位于容纳部分的外侧，电路板放置在该外部，使得电路板的至少一个固定部分与突起接触，用于限制电路板相对于灯罩的运动。

    Systems and methods for rate-limited weighted best effort scheduling
    95.
    发明授权
    Systems and methods for rate-limited weighted best effort scheduling 失效
    速率限制加权最佳努力调度的系统和方法

    公开(公告)号：US07474662B2

    公开(公告)日：2009-01-06

    申请号：US11119329

    申请日：2005-04-29

    Applicant: Claude Basso ,  Jean Louis Calvignac ,  Chih-jen Chang ,  Natarajan Vaidhyanathan ,  Fabrice Jean Verplanken

    Inventor： Claude Basso ,  Jean Louis Calvignac ,  Chih-jen Chang ,  Natarajan Vaidhyanathan ,  Fabrice Jean Verplanken

    IPC: H04L12/56

    CPC classification number: H04L47/623 ,  H04L47/50 ,  H04L47/568

    Abstract: Systems and methods for scheduling data packets in a network processor are disclosed. Embodiments provide a network processor that comprises a best-effort scheduler with a minimal calendar structure for addressing schedule control blocks. In one embodiment, a four-entry calendar structure provides for rate-limited weighted best effort scheduling. Each of a plurality of different flows has associated schedule control blocks. Schedule control blocks are stored as linked lists in a last-in-first-out buffer. Each calendar entry is associated with a different linked list by storing in the calendar entry the address of the first-out schedule control block in the linked list. Each schedule control block has a counter and is assigned a rate limit according to the bandwidth priority of the flow to which the corresponding packet belongs. Each time a schedule control block is accessed from a last-in-first-out buffer storing the linked list, the scheduler generates a scheduling event and the counter of the schedule control block is incremented. When an incremented counter of a schedule control block equals its rate limit, the schedule control block is temporarily removed from further scheduling until a time interval concludes.

    Abstract translation: 公开了一种用于在网络处理器中调度数据分组的系统和方法。 实施例提供了一种网络处理器，其包括具有用于寻址日程控制块的最小日历结构的尽力而为调度器。 在一个实施例中，四入口日历结构提供速率受限加权最佳努力调度。 多个不同流中的每一个都具有相关联的调度控制块。 计划控制块作为链表存储在先进先出缓冲区中。 通过在日历条目中存储链表中的先出时间表控制块的地址来将每个日历条目与不同的链表相关联。 每个调度控制块都有一个计数器，并根据相应数据包所属的流的带宽优先级分配速率限制。 每当从存储链表的最先进先出缓冲器访问调度控制块时，调度器生成调度事件，并且调度控制块的计数器递增。 当调度控制块的递增计数器等于其速率限制时，调度控制块暂时从进一步调度中移除，直到时间间隔结束。

    SYSTEMS AND METHODS FOR MULTI-FRAME CONTROL BLOCKS
    97.
    发明申请
    SYSTEMS AND METHODS FOR MULTI-FRAME CONTROL BLOCKS 有权
    多框控制块的系统和方法

    公开(公告)号：US20080147995A1

    公开(公告)日：2008-06-19

    申请号：US12039304

    申请日：2008-02-28

    Applicant: Claude Basso ,  Jean Louis Calvignac ,  Chih-jen Chang ,  Fabrice Jean Verplanken

    Inventor： Claude Basso ,  Jean Louis Calvignac ,  Chih-jen Chang ,  Fabrice Jean Verplanken

    IPC: G06F12/00

    CPC classification number: H04L49/901 ,  H04L49/252 ,  H04L49/30 ,  H04L49/90 ,  H04L69/12 ,  H04L69/22

    Abstract: Systems and methods for implementing multi-frame control blocks in a network processor are disclosed. Embodiments include systems and methods to reduce long latency memory access to less expensive memory such as DRAM. As a network processor in a network receives packets of data, the network processor forms a frame control block for each packet. The frame control block contains a pointer to a memory location where the packet data is stored, and is thereby associated with the packet. The network processor associates a plurality of frame control blocks together in a table control block that is stored in a control store. Each table control block comprises a pointer to a memory location of a next table control block in a chain of table control blocks. Because frame control blocks are stored and accessed in table control blocks, less frequent memory accesses may be needed to keep up with the frame rate of packet transmission.

    Abstract translation: 公开了一种用于在网络处理器中实现多帧控制块的系统和方法。 实施例包括用于减少长时间存储器访问到诸如DRAM之类的便宜的存储器的系统和方法。 随着网络中的网络处理器接收数据包，网络处理器为每个数据包形成帧控制块。 帧控制块包含指向存储分组数据的存储器位置的指针，并且因此与分组相关联。 网络处理器将存储在控制存储器中的表控制块中的多个帧控制块相关联。 每个表控制块包括指向表控制块链中的下一个表控制块的存储器位置的指针。 由于帧控制块在表控制块中被存储和访问，因此可能需要较少频率的存储器访问以跟上分组传输的帧速率。

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