公开(公告)号：US07627801B2

公开(公告)日：2009-12-01

申请号：US11174790

申请日：2005-07-05

Applicant: Hui Jin ,  Tom Richardson ,  Vladimir Novichkov

Inventor： Hui Jin ,  Tom Richardson ,  Vladimir Novichkov

IPC: H03M13/00 ,  H03M13/05

CPC classification number: H03M13/6362 ,  H03M13/1102 ,  H03M13/1137 ,  H03M13/116 ,  H03M13/1182

Abstract: Methods and apparatus for encoding codewords which are particularly well suited for use with low density parity check (LDPC) codes and long codewords are described. The described methods allow encoding graph structures which are largely comprised of multiple identical copies of a much smaller graph. Copies of the smaller graph are subject to a controlled permutation operation to create the larger graph structure. The same controlled permutations are directly implemented to support bit passing between the replicated copies of the small graph. Bits corresponding to individual copies of the graph are stored in a memory and accessed in sets, one from each copy of the graph, using a SIMD read or write instruction. The graph permutation operation may be implemented by simply reordering bits, e.g., using a cyclic permutation operation, in each set of bits read out of a bit memory so that the bits are passed to processing circuits corresponding to different copies of the small graph.

Abstract translation: 描述了特别适用于低密度奇偶校验（LDPC）码和长码字的码字的编码方法和装置。 所描述的方法允许编码图形结构，其大部分由更小的图的多个相同副本组成。 较小图的副本经受受控置换操作以创建较大的图形结构。 直接实现相同的受控置换，以支持小图的复制副本之间的位传递。 与图形的各个副本对应的位存储在存储器中，并使用SIMD读取或写入指令以组合的形式从图形的每个副本中进行访问。 图形置换操作可以通过在比特存储器中读出的每组比特中简单地重新排序比特，例如使用循环置换操作来实现，使得比特被传递到对应于小图的不同副本的处理电路。

公开(公告)号：US20090063933A1

公开(公告)日：2009-03-05

申请号：US12128516

申请日：2008-05-28

Applicant: Tom Richardson ,  Hui Jin ,  Vladimir Novichkov

Inventor： Tom Richardson ,  Hui Jin ,  Vladimir Novichkov

IPC: H03M13/05 ,  G06F11/07

CPC classification number: H04L1/0057 ,  H03M13/1137 ,  H03M13/116 ,  H03M13/6513 ,  H03M13/6516 ,  H04L1/0045

Abstract: A flexible and relatively hardware efficient LDPC decoder is described. The decoder can be implemented with a level of parallelism which is less than the full parallelism of the code structure used to control the decoding process. Each command of a relatively simple control code used to describe the code structure can be stored and executed multiple times to complete the decoding of a codeword. Different codeword lengths are supported using the same set of control code instructions but with the code being implemented a different number of times depending on the codeword length. The decoder can switch between decoding codewords of different lengths, without the need to change the stored code description information, by simply changing a code lifting factor that is indicative of codeword length and is used to control the decoding process. When decoding codewords shorter than the maximum supported codeword length some block storage locations may go unused.

Abstract translation: 描述了一种灵活且相对硬件有效的LDPC解码器。 该解码器可以用低于用于控制解码过程的代码结构的完全并行性的并行级别来实现。 用于描述代码结构的相对简单的控制代码的每个命令可以被多次存储和执行以完成码字的解码。 使用相同的一组控制码指令支持不同的码字长度，但是根据码字长度，代码被实现不同的次数。 解码器可以通过简单地改变表示码字长度的代码提升因子而不需要改变存储的代码描述信息来切换不同长度的解码码字，并用于控制解码过程。 当解码短于最大支持码字长度的码字时，一些块存储位置可能不被使用。

公开(公告)号：US07346832B2

公开(公告)日：2008-03-18

申请号：US10895547

申请日：2004-07-21

Applicant: Tom Richardson ,  Hui Jin

Inventor： Tom Richardson ,  Hui Jin

IPC: H03M13/00

CPC classification number: H03M13/6508 ,  H03M13/116 ,  H03M13/118 ,  H03M13/611

Abstract: A flexible and relatively hardware efficient LDPC encoder is described. The encoder can be implemented with a level of parallelism which is less than the full parallelism of the code structure used to control the encoding process. Each command of a relatively simple microcode used to describe the code structure can be stored and executed multiple times to complete the encoding of a codeword. Different codeword lengths can be supported using the same set of microcode instructions but with the code being implemented a different number of times depending on the lifting factor selected to be used. The LDPC encoder can switch between encoding codewords of different lengths, without the need to change the stored code description information, by simply changing a code lifting factor used to control the encoding processes. When coding codewords shorter than the maximum supported codeword length some block storage locations and/or registers may go unused.

Abstract translation: 描述了一种灵活且相对硬件高效的LDPC编码器。 编码器可以以小于平行度的水平来实现，该并行度小于用于控制编码过程的代码结构的完全并行性。 用于描述代码结构的相对简单的微代码的每个命令可以被多次存储和执行以完成代码字的编码。 可以使用相同的微代码指令集来支持不同的码字长度，但是根据所选择的使用的提升因子，代码被实现不同的次数。 LDPC编码器可以通过简单地改变用于控制编码处理的代码提升因子来切换不同长度的编码码字，而不需要改变存储的代码描述信息。 当编码比最大支持的码字长度短的码字时，一些块存储位置和/或寄存器可能不被使用。

公开(公告)号：US20080046186A1

公开(公告)日：2008-02-21

申请号：US11507253

申请日：2006-08-21

Applicant: Robert James North ,  QingFeng Zhu ,  Gang Xu ,  Hui Jin

Inventor： Robert James North ,  QingFeng Zhu ,  Gang Xu ,  Hui Jin

IPC: G06F19/00 ,  G06F17/40

CPC classification number: E21B47/10 ,  G01F1/74

Abstract: A method of determining fluid phase distribution comprises receiving a plurality of oriented probe data; grouping the oriented probe data based on a depth interval; processing the grouped probe data; and generating fluid phase distribution information based on the processed result.

Abstract translation: 一种确定流体相分布的方法包括：接收多个定向探针数据; 基于深度间隔对定向探针数据进行分组; 处理分组的探测数据; 以及基于处理结果产生流体相分布信息。

公开(公告)号：US20080014891A1

公开(公告)日：2008-01-17

申请号：US11486821

申请日：2006-07-14

Applicant: Hui Jin ,  Tom Richardson ,  Rajiv Laroia ,  Junyi Li

Inventor： Hui Jin ,  Tom Richardson ,  Rajiv Laroia ,  Junyi Li

IPC: H04B7/08 ,  H04B1/06 ,  H04B7/00

CPC classification number: H04B7/0808

Abstract: The claimed subject matter relates to enabling antenna switching in a wireless terminal that has multiple receive antennas per receive chain via soft-demodulation and interleaving of concatenated code received in a strip channel. A coherent demodulation protocol may be performed to estimate an SNR for a first antenna during a first time period, and a non-coherent demodulation protocol may be utilized on the strip channel to estimate an SNR for at least one other antenna during a second time period. SNRs may be compared and the terminal may select the antenna with the highest SNR for a next transmission superslot.

Abstract translation: 所要求保护的主题涉及通过在条带信道中接收的连接码的软解调和交织来在每个接收链上具有多个接收天线的无线终端中启用天线切换。 可以执行相干解调协议以在第一时间段期间估计第一天线的SNR，并且可以在带通道上利用非相干解调协议来估计在第二时间段期间的至少一个其他天线的SNR 。 可以比较SNR，并且终端可以选择具有最高SNR的天线用于下一个传输超频。

公开(公告)号：US20070242639A1

公开(公告)日：2007-10-18

申请号：US11487260

申请日：2006-07-14

Applicant: Alexander Leonidov ,  Hui Jin ,  Rajiv Laroia ,  Junyi Li ,  Murari Srinivasan

Inventor： Alexander Leonidov ,  Hui Jin ,  Rajiv Laroia ,  Junyi Li ,  Murari Srinivasan

IPC: H04B7/216

CPC classification number: H04L27/2608

Abstract: Improved ways of communicating assignment signals using flash signaling are described, e.g., for wireless terminals with low SNR, that are more robust against large variation of channel gains due to e.g., frequency selective fading and fast fading in time. Coding and modulation methods and apparatus that have excellent properties against symbol erasures are described. The use of flash signaling provides an improved assignment channel having strong performance on the fading channel without compromising the performance on the AWGN channel. In one exemplary embodiment, the coding and modulation method can tolerate up to 5 erased symbols out of 8 transmitted symbols. One embodiment reduces or minimizes the sector interference on the flash assignment by improving or maximizing orthogonality between different sectors. In addition, one embodiment describes improved ways of swapping flash assignment tone-symbols in the presence other high priority signals, like sector pilots and sector null pilots.

Abstract translation: 例如，对于具有低SNR的无线终端，使用闪信号进行传送分配信号的改进方式对于由于例如频率选择性衰落和时间上的快速衰落而导致的信道增益的大变化更加鲁棒。 描述了具有针对符号擦除的优异特性的编码和调制方法和装置。 闪光信令的使用提供了在衰落信道上具有强性能的改进的分配信道，而不损害AWGN信道上的性能。 在一个示例性实施例中，编码和调制方法可以容忍8个发送的符号中多达5个擦除的符号。 一个实施例通过改善或最大化不同扇区之间的正交性来减少或最小化闪存分配上的扇区干扰。 此外，一个实施例描述了在存在其他高优先级信号（如扇区导频和扇区空导频）时交换闪存分配音调符号的改进方式。

公开(公告)号：US07116710B1

公开(公告)日：2006-10-03

申请号：US09861102

申请日：2001-05-18

Applicant: Hui Jin ,  Aamod Khandekar ,  Robert J. McEliece

Inventor： Hui Jin ,  Aamod Khandekar ,  Robert J. McEliece

IPC: H04B1/66

CPC classification number: H03M13/2939 ,  H03M13/1102 ,  H03M13/1197 ,  H03M13/2972

Abstract: A serial concatenated coder includes an outer coder and an inner coder. The outer coder irregularly repeats bits in a data block according to a degree profile and scrambles the repeated bits. The scrambled and repeated bits are input to an inner coder, which has a rate substantially close to one.

Abstract translation: 串行级联编码器包括外编码器和内编码器。 外部编码器根据程度轮廓不规则地重复数据块中的比特，并对重复的比特进行加扰。 加密和重复的比特被输入到内部编码器，内部编码器的速率基本接近于1。

公开(公告)号：US20060218460A1

公开(公告)日：2006-09-28

申请号：US11429083

申请日：2006-05-05

Applicant: Dariush Divsalar ,  Robert McEliece ,  Hui Jin ,  Fabrizio Pollara

Inventor： Dariush Divsalar ,  Robert McEliece ,  Hui Jin ,  Fabrizio Pollara

IPC: H03M13/00

CPC classification number: H03M13/296 ,  H03M13/1111 ,  H03M13/2972

Abstract: A turbo-like code is formed by repeating the signal, coding it, and interleaving it. A serial concatenated coder is formed of an inner coder and an outer coder separated by an interleaver. The outer coder is a coder which has rate greater than one e.g. a repetition coder. The interleaver rearranges the bits. An outer coder is a rate one coder.

公开(公告)号：US20060203856A1

公开(公告)日：2006-09-14

申请号：US11230300

申请日：2005-09-19

Applicant: Rajiv Laroia ,  Hui Jin ,  Tom Richardson ,  Junyi Li

Inventor： Rajiv Laroia ,  Hui Jin ,  Tom Richardson ,  Junyi Li

IPC: H04J3/12

CPC classification number: H04W52/08 ,  H04L1/0025 ,  H04L1/0026 ,  H04L27/2608 ,  H04W28/22 ,  H04W52/04 ,  H04W72/0413

Abstract: A wireless terminal includes an uplink rate option indicator in the same uplink channel segment with data, the rate option indicator providing transmission rate information about the data transmitted in the segment. The indicator value is represented by an energy pattern within the segment. Different energy patterns correspond to different indicator values. The number of indicator values is less than the number of possible uplink data rate options supported by the wireless terminal. A single indicator value represents different uplink data rate options, at different times, as a function of a received maximum data rate option and/or type of assignment message. The maximum data rate option and/or assignment message was transmitted by the same base station receiving the indicator value; therefore, there is no ambiguity between wireless terminal and base station as to the interpretation of the uplink data rate option indicator value with respect to an individual uplink segment.

Abstract translation: 无线终端包括与数据相同的上行链路信道段中的上行链路速率选项指示符，速率选项指示符提供关于在该段中发送的数据的传输速率信息。 指标值由段内的能量模式表示。 不同的能量模式对应于不同的指标值。 指标值的数量小于无线终端支持的可能的上行链路数据速率选项的数量。 单个指标值表示不同的上行链路数据速率选项，在不同的时间，作为接收到的最大数据速率选项和/或分配消息的类型的函数。 最大数据速率选项和/或分配消息由接收到指标值的同一基站发送; 因此，关于单个上行链路段的上行链路数据速率选项指示符值的解释，无线终端和基站之间没有歧义。

公开(公告)号：US20060020868A1

公开(公告)日：2006-01-26

申请号：US10895645

申请日：2004-07-21

Applicant: Tom Richardson ,  Hui Jin ,  Vladimir Novichkov

Inventor： Tom Richardson ,  Hui Jin ,  Vladimir Novichkov

IPC: H03M13/00

CPC classification number: H04L1/0057 ,  H03M13/1137 ,  H03M13/116 ,  H03M13/6513 ,  H03M13/6516 ,  H04L1/0045

Abstract: A flexible and relatively hardware efficient LDPC decoder is described. The decoder can be implemented with a level of parallelism which is less than the full parallelism of the code structure used to control the decoding process. Each command of a relatively simple control code used to describe the code structure can be stored and executed multiple times to complete the decoding of a codeword. Different codeword lengths are supported using the same set of control code instructions but with the code being implemented a different number of times depending on the codeword length. The decoder can switch between decoding codewords of different lengths, without the need to change the stored code description information, by simply changing a code lifting factor that is indicative of codeword length and is used to control the decoding process. When decoding codewords shorter than the maximum supported codeword length some block storage locations may go unused.

Abstract translation: 描述了一种灵活且相对硬件有效的LDPC解码器。 该解码器可以用低于用于控制解码过程的代码结构的完全并行性的并行级别来实现。 用于描述代码结构的相对简单的控制代码的每个命令可以被多次存储和执行以完成码字的解码。 使用相同的一组控制码指令支持不同的码字长度，但是根据码字长度，代码被实现不同的次数。 解码器可以通过简单地改变表示码字长度的代码提升因子而不需要改变存储的代码描述信息来切换不同长度的解码码字，并用于控制解码过程。 当解码短于最大支持码字长度的码字时，一些块存储位置可能不被使用。