IO direct memory access system and method
    91.
    发明授权
    IO direct memory access system and method 有权
    IO直接内存访问系统和方法

    公开(公告)号:US07386642B2

    公开(公告)日:2008-06-10

    申请号:US11045767

    申请日:2005-01-28

    CPC classification number: G06F13/28

    Abstract: Direct memory access is provided for each member of a group of IO devices organized into groups. Direct memory access for each IO device is performed in a predetermined order based on the predetermined groups, and may be completed by notification by an interrupt request. A predetermined time delay may be specified between each memory access by each IO device of a predetermined group.

    Abstract translation: 为组织的组的一组IO设备的每个成员提供直接存储器访问。 基于预定组,以预定的顺序执行每个IO设备的直接存储器访问,并且可以通过中断请求的通知来完成。 可以在预定组的每个IO设备的每个存储器访问之间指定预定的时间延迟。

    Methods and apparatus for achieving thermal management using processor manipulation
    92.
    发明授权
    Methods and apparatus for achieving thermal management using processor manipulation 有权
    使用处理器操纵实现热管理的方法和装置

    公开(公告)号:US07360102B2

    公开(公告)日:2008-04-15

    申请号:US10812155

    申请日:2004-03-29

    Applicant: Keisuke Inoue

    Inventor: Keisuke Inoue

    CPC classification number: G06F1/206

    Abstract: The present invention provides apparatus and methods to perform thermal management in a computing environment. Thermal attributes are associated with operations and/or processing components. The components have thermal thresholds that should not be exceeded. In a preferred embodiment, an operation can be transferred from one component to another component if the thermal threshold is exceeded during execution by the first component.

    Abstract translation: 本发明提供了在计算环境中执行热管理的装置和方法。 热属性与操作和/或处理组件相关联。 组件具有不应超过的热阈值。 在优选实施例中,如果在由第一部件执行期间超过热阈值,则可以将操作从一个部件传送到另一部件。

    System and method of interrupt handling
    93.
    发明授权
    System and method of interrupt handling 有权
    中断处理的系统和方法

    公开(公告)号:US07350006B2

    公开(公告)日:2008-03-25

    申请号:US11346947

    申请日:2006-02-03

    CPC classification number: G06F9/4812 G06F13/26

    Abstract: A multiprocessor system and method wherein one of the processors is assigned the responsibility of handling interrupts and identifying the next processor to handle an interrupt. When that processor switches tasks and determines that it is no longer the least important processor as far as task priority is concerned, it will then select and transfer its interrupt-related responsibilities (i.e., handling the interrupt and determining the next interrupt-handing processor) to the processor which is executing the least important task. The selected processor will then be designated for handling interrupts unless and until it undergoes a task switch and selects a different processor.

    Abstract translation: 一种多处理器系统和方法,其中处理器之一被分配处理中断的责任并识别下一个处理器来处理中断。 当处理器切换任务并确定它不再是任务优先级中最不重要的处理器时,它将选择并传递其与中断有关的职责(即处理中断并确定下一个中断处理器) 到执行最不重要任务的处理器。 然后,所选择的处理器将被指定用于处理中断,除非和直到它进行任务切换并选择不同的处理器。

    Inspection Apparatus, Program Tampering Detection Apparatus and Method for Specifying Memory Layout
    94.
    发明申请
    Inspection Apparatus, Program Tampering Detection Apparatus and Method for Specifying Memory Layout 审中-公开
    检测装置,程序篡改检测装置和用于指定存储器布局的方法

    公开(公告)号:US20080066056A1

    公开(公告)日:2008-03-13

    申请号:US11850963

    申请日:2007-09-06

    Applicant: Keisuke Inoue

    Inventor: Keisuke Inoue

    CPC classification number: G06F11/3644

    Abstract: A debugger 100 is connected to a multi-processor system configured so that each processor autonomously accesses a shared memory and loads a program stored in the shared memory into storage of the processor. An identifier defined uniquely in the system is included in code of the program module in advance. A GUID detector 118 selects an ID-attached instruction, the identifier being described in a field of the instruction, from the memory image of the local memory of the processor to be inspected and extracts the identifier. A code retriever 120 selects code of a program module, corresponding to the extracted identifier, from a code holder 114. A memory layout output unit 122 outputs the code selected by the code retriever 120, while associating the code with a memory address of the module in the local memory.

    Abstract translation: 调试器100连接到多处理器系统,其被配置为使得每个处理器自主地访问共享存储器并将存储在共享存储器中的程序加载到处理器的存储器中。 系统中唯一定义的标识符预先包含在程序模块的代码中。 GUID检测器118从要检查的处理器的本地存储器的存储器图像中选择在该指令的字段中描述的标识符附加的指令,并且提取标识符。 代码检索器120从代码保持器114中选择与提取的标识符相对应的程序模块的代码。 存储器布局输出单元122输出由代码检索器120选择的代码,同时将代码与本地存储器中的模块的存储器地址相关联。

    Micro interrupt handler
    96.
    发明申请
    Micro interrupt handler 失效
    微型中断处理程序

    公开(公告)号:US20060179198A1

    公开(公告)日:2006-08-10

    申请号:US11345893

    申请日:2006-02-02

    CPC classification number: G06F13/24

    Abstract: A system and method is provided for improved interrupt handling via a micro interrupt handler. Upon an interrupt signal being sent to a processor running a task, a first part of the running task is stored to system memory via direct memory access. A micro interrupt handler is read from the system memory to begin handling the interrupt signal. A second part of the running task is stored to system memory via direct memory access. The micro interrupt handler is executed and read and the previous running task is read from direct memory access and restored. Long lag times for interrupt processing and inefficiencies in processor queues are avoided.

    Abstract translation: 提供了一种通过微中断处理程序改进中断处理的系统和方法。 当中断信号被发送到运行任务的处理器时,运行任务的第一部分通过直接存储器访问被存储到系统存储器。 从系统存储器读取微型中断处理程序,开始处理中断信号。 运行任务的第二部分通过直接内存访问存储到系统内存。 执行和读取微中断处理程序,并从直接存储器访问读取先前运行的任务并恢复。 避免了中断处理的长滞后时间和处理器队列的低效率。

    Diagnostic data detection and control
    97.
    发明申请
    Diagnostic data detection and control 失效
    诊断数据检测和控制

    公开(公告)号:US20050209820A1

    公开(公告)日:2005-09-22

    申请号:US11077285

    申请日:2005-03-10

    CPC classification number: G05B23/0232 G05B2219/32187 Y02P90/22

    Abstract: Provides a diagnostic apparatus for diagnosing a measured object based on time-series data of a plurality of parameters measured from the measured object. An example of an apparatus includes a change-point score calculating portion for calculating a time-series change-point score with which each of the plurality of parameters changes according to passage of time based on the time-series data on the parameter, a change-point correlation calculating portion for calculating a change-point correlation indicating strength by which each of the plurality of parameters is associated with each of other parameters based on the change-point scores of the parameter and the other parameter, and a parameter outputting portion for outputting a set of parameters of which calculated degrees of associations are higher than a predetermined reference change-point correlation as a set of mutually strongly associated parameters.

    Abstract translation: 提供一种诊断装置,用于根据从测量对象测量的多个参数的时间序列数据来诊断测量对象。 一种装置的例子包括:变化点分数计算部分,用于根据参数的时间序列数据,计算多个参数中的每个参数根据时间的变化而变化的时间序列变化点得分,变化点分数计算部分, 点相关计算部分,用于基于参数和另一参数的变化点得分,计算指示多个参数中的每一个与其他参数中的每一个相关联的强度的变化点相关性;以及参数输出部分, 将相关联的计算度的一组参数作为相互强烈相关的参数的集合输出,所述一组参数高于预定的参考变化点相关性。

    Methods and apparatus for task management in a multi-processor system
    98.
    发明申请
    Methods and apparatus for task management in a multi-processor system 失效
    多处理器系统中任务管理的方法和装置

    公开(公告)号:US20050188373A1

    公开(公告)日:2005-08-25

    申请号:US10783246

    申请日:2004-02-20

    Abstract: Methods and apparatus are provided for managing processor tasks in a multi-processor computing system. The system is operable to store the processor tasks in a shared memory that may be accessed by a plurality of sub-processing units of the multi-processor computing system; and permit the sub-processing units to determine which of the processor tasks should be copied from the shared memory and executed based on priorities of the processor tasks.

    Abstract translation: 提供了用于在多处理器计算系统中管理处理器任务的方法和装置。 该系统可操作以将处理器任务存储在可由多处理器计算系统的多个子处理单元访问的共享存储器中; 并且允许子处理单元基于处理器任务的优先级来确定应该从共享存储器复制哪个处理器任务并执行。

    Methods and apparatus for processor task migration in a multi-processor system
    99.
    发明申请
    Methods and apparatus for processor task migration in a multi-processor system 有权
    多处理器系统中处理器任务迁移的方法和装置

    公开(公告)号:US20050188372A1

    公开(公告)日:2005-08-25

    申请号:US10783238

    申请日:2004-02-20

    CPC classification number: G06F9/4856 G06F9/4411 G06F9/5038 G06F2209/5021

    Abstract: Methods and apparatus are provided for executing processor tasks on a multi-processing system. The multi-processing system includes a plurality of sub-processing units and a main processing unit that may access a shared memory. Each sub-processing unit includes an on-chip local memory separate from the shared memory. The methods and apparatus contemplate: providing that the processor tasks be copied from the shared memory into the local memory of the sub-processing units in order to execute them, and prohibiting the execution of the processor tasks from the shared memory; and migrating at least one processor task from one of the sub-processing units to another of the sub-processing units.

    Abstract translation: 提供了用于在多处理系统上执行处理器任务的方法和装置。 多处理系统包括可以访问共享存储器的多个子处理单元和主处理单元。 每个子处理单元包括与共享存储器分离的片上本地存储器。 所述方法和设备考虑:提供处理器任务从共享存储器复制到子处理单元的本地存储器中以便执行它们,并且禁止从共享存储器执行处理器任务; 以及将至少一个处理器任务从所述子处理单元之一迁移到所述子处理单元中的另一个。

    Shape generation apparatus, control method to cause computer apparatus to operate as shape generation apparatus and computer executable program to allow computer apparatus to execute the control method
    100.
    发明申请
    Shape generation apparatus, control method to cause computer apparatus to operate as shape generation apparatus and computer executable program to allow computer apparatus to execute the control method 审中-公开
    形状生成装置,使计算机装置作为形状生成装置进行动作的控制方法以及计算机可执行程序,以允许计算机装置执行控制方法

    公开(公告)号:US20050021318A1

    公开(公告)日:2005-01-27

    申请号:US10819272

    申请日:2004-04-07

    CPC classification number: G06K9/469 G06K9/00201 G06T17/20

    Abstract: [Object] To provide a shape generation apparatus, a control method to cause a computer apparatus to operate as a shape generation apparatus and computer executable programs to allow a computer apparatus to execute the control method. [Solution] The shape generation apparatus of this invention has an input model storage part 20 to store 3-dimensional input model data, an adjacency graph storage part 22 to store adjacency graph data generated by assigning face clusters to the input model, and a cluster coupling part 28 which executes coupling processing for the face clusters of the adjacency graph data. In addition, the shape generation apparatus also has a topology judgment part 30, which reads out the adjacency graph data and judges topology of the adjacency graph data read out, and a topology operation part 34, which changes node or arc data of the adjacency graph data in response to the judgment of the topology judgment part.

    Abstract translation: 提供一种形状生成装置,使计算机装置作为形状生成装置进行动作的控制方法和计算机可执行程序,以允许计算机装置执行控制方法。 [解决方案]本发明的形状生成装置具有用于存储3维输入模型数据的输入模型存储部20,相邻图存储部22,其将通过分配面群而生成的邻接图数据存储到输入模型, 耦合部分28,其执行邻接图数据的面簇的耦合处理。 此外,形状发生装置还具有拓扑判断部30,其读出邻接图数据并判断读出的邻接图数据的拓扑结构,以及拓扑运算部34,其改变邻接图的节点或弧数据 响应于拓扑判断部分的判断的数据。

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