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公开(公告)号:US11846654B2
公开(公告)日:2023-12-19
申请号:US17209662
申请日:2021-03-23
发明人: Romeo Letor
CPC分类号: G01R31/58 , G01R19/003 , G01R19/17 , H02H1/0007 , H02H9/025
摘要: Described herein is a method including measuring a current in a wire, normalizing the measured current, and comparing the normalized measured current to a control curve. The control curve is a function of a series of normalized current magnitudes and reaction times for corresponding ones of that series of normalized current magnitudes. The method further includes limiting the current in the wire based upon the comparison. The reaction times for ones of the series of normalized current magnitudes are times at which current limitation would occur if the normalized current remained at an associated normalized current magnitude.
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公开(公告)号:US20230402980A1
公开(公告)日:2023-12-14
申请号:US17827293
申请日:2022-05-27
发明人: Gaetano Cosentino
CPC分类号: H03F3/45179 , H04B1/16 , H03F2200/69 , H03F3/72 , H03F2203/45 , H03F3/4508
摘要: In an embodiment, a differential buffer includes: first and second input terminals configured to receive a differential input voltage; first and second output terminals configured to provide a differential output voltage; a differential source follower amplifier having first and second inputs respectively coupled to the first and second input terminals, and first and second outputs respectively coupled to the first and second output terminals; and a differential common source amplifier having first and second inputs respectively coupled to the second and first output terminals via a first pair of capacitors, and first and second outputs respectively coupled to the first and second output terminals.
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公开(公告)号:US11843369B2
公开(公告)日:2023-12-12
申请号:US17388920
申请日:2021-07-29
CPC分类号: H03K17/302 , H01L27/0629 , H01L29/0696 , H01L29/66734 , H01L29/7808 , H01L29/7813
摘要: An integrated device includes at least one MOS transistor having a plurality of cells. In each of one or more of the cells a disabling structure is provided. The disabling structure is configured to be in a non-conductive condition when the MOS transistor is switched on in response to a control voltage comprised between a threshold voltage of the MOS transistor and an intervention voltage of the disabling structure, or to be in a conductive condition otherwise. A system comprising at least one integrated device as above is also proposed. Moreover, a corresponding process for manufacturing this integrated device is proposed.
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公开(公告)号:US11842954B2
公开(公告)日:2023-12-12
申请号:US17887838
申请日:2022-08-15
IPC分类号: H01L23/495 , H01L21/48 , H01L21/56
CPC分类号: H01L23/49586 , H01L21/481 , H01L21/4825 , H01L21/565 , H01L23/49506
摘要: A plastic material substrate has a die mounting location for a semiconductor die. Metallic traces are formed on selected areas of the plastic material substrate, wherein the metallic traces provide electrically-conductive paths for coupling to the semiconductor die. The semiconductor die is attached onto the die mounting location. The semiconductor die attached onto the die mounting location is electrically bonded to selected ones of the metallic traces formed on the plastic material substrate. A package material is molded onto the semiconductor die attached onto the die mounting location.
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公开(公告)号:US11841497B2
公开(公告)日:2023-12-12
申请号:US17109929
申请日:2020-12-02
CPC分类号: G02B26/0833 , G05B5/01 , G09G3/025 , H03G1/0005 , H04N9/3135
摘要: Disclosed herein is a control system for a projection system, including a first subtractor receiving an input drive signal and a feedback signal and generating a first difference signal therefrom, the feedback signal being indicative of position of a quasi static micromirror of the projection system. A type-2 compensator receives the first difference signal and generates therefrom a first output signal. A derivative based controller receives the feedback signal and generates therefrom a second output signal. A second subtractor receives the first and second output signals and generates a second difference signal therefrom. The second difference signal serves to control a mirror driver of the projection system. A higher order resonance equalization circuit receives a pre-output signal from an analog front end of the projection system that is indicative of position of the quasi static micromirror, and generates the feedback signal therefrom.
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公开(公告)号:US20230396407A1
公开(公告)日:2023-12-07
申请号:US18453018
申请日:2023-08-21
发明人: Matteo QUARTIROLI , Paolo ROSINGANA
IPC分类号: H04L7/00
CPC分类号: H04L7/0079
摘要: A sensor includes detection circuitry and control circuitry coupled to the detection circuitry. The detection circuitry generates a detection signal indicative of a detected physical quantity. The control circuitry, in operation receives the detection signal and a frequency-indication signal, and generates a trigger signal based on the frequency-indication signal and a set of local reference signals. The sensor generates a digital output signal and a locking signal based on the trigger signal and the detection signal. The generating the digital output signal includes outputting a sample of the digital output signal based on the trigger signal. The locking signal is temporally aligned with the digital output signal.
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公开(公告)号:US20230393198A1
公开(公告)日:2023-12-07
申请号:US18324583
申请日:2023-05-26
发明人: Diego ALAGNA , Alessandro CANNONE
IPC分类号: G01R31/3177 , G01R31/317 , G06F1/08
CPC分类号: G01R31/3177 , G06F1/08 , G01R31/31725
摘要: A first circuit is coupled to a second circuit via a communication link. The first circuit generates a first validation signal, a second validation signal, and control signals, and transmits the first and second validation signals to the second circuit via the communication link. The second circuit validates the control signals based on the first and second binary validation signals. The validating includes: verifying that when the first validation signal has a first value, the second validation signal has a second value different from the first value; verifying that when the second validation signal has the first value, the first validation signal has the second value; verifying detection of a transition edge of the first validation signal within a threshold number of clock cycles; and verifying detection of a transition edge of the second validation signal within the threshold number of clock cycles.
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98.
公开(公告)号:US11834054B2
公开(公告)日:2023-12-05
申请号:US17470962
申请日:2021-09-09
发明人: Nicola Matteo Palella , Leonardo Colombo , Andrea Donadel , Roberto Mura , Mahaveer Jain , Joëlle Philippe
IPC分类号: B60W40/11 , B60W40/101 , B60W40/112 , B60W40/114 , G01S19/47
CPC分类号: B60W40/101 , B60W40/11 , B60W40/112 , B60W40/114 , G01S19/47 , B60W2520/28
摘要: A system includes inertial sensors and a GPS. The system generates a first estimated vehicle velocity based on motion data and positioning data, generates a second estimated vehicle velocity based on the processed motion data and the first estimated vehicle velocity, and generates fused datasets indicative of position, velocity and attitude of a vehicle based on the processed motion data, the positioning data and the second estimated vehicle velocity. The generating the second estimated vehicle velocity includes: filtering the motion data, transforming the filtered motion data in a frequency domain based on the first estimated vehicle velocity, generating spectral power density signals, generating an estimated wheel angular frequency and an estimated wheel size based on the spectral power density signals, and generating the second estimated vehicle velocity as a function of the estimated wheel angular frequency and the estimated wheel size.
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公开(公告)号:US20230389450A1
公开(公告)日:2023-11-30
申请号:US18305268
申请日:2023-04-21
CPC分类号: H10N70/231 , G11C13/0004 , G11C13/0069 , H10N70/8413 , H10N70/8828 , G11C2013/008
摘要: Phase-change memory cells and methods of manufacturing and operating phase-change memory cells are provided. In at least one embodiment, a phase-change memory cell includes a heater and a stack. The stack includes at least one germanium layer or a nitrogen doped germanium layer, and at least one layer of a first alloy including germanium, antimony, and tellurium. A resistive layer is located between the heater and the stack.
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公开(公告)号:US20230384837A1
公开(公告)日:2023-11-30
申请号:US18183464
申请日:2023-03-14
IPC分类号: G06F1/16 , H04M1/02 , G06F1/3246 , G01C1/00
CPC分类号: G06F1/1677 , H04M1/0245 , G06F1/3246 , G01C1/00 , G01C9/08
摘要: The present disclosure is directed to a device and method for lid angle detection that is accurate even if the device is activated in an upright position. While the device is in a sleep state, first and second sensor units measure acceleration and angular velocity, and calculate orientations of respective lid components based on the acceleration and angular velocity measurements. Upon the device exiting the sleep state, a processor estimates the lid angle using the calculated orientations, sets the estimated lid angle as an initial lid angle, and updates the initial lid angle using, for example, two accelerometers; two accelerometers and two gyroscopes; two accelerometers and two magnetometers; or two accelerometers, two gyroscopes, and two magnetometers.
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