公开(公告)号：US20200343089A1

公开(公告)日：2020-10-29

申请号：US16787672

申请日：2020-02-11

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen

IPC: H01L21/02 ,  H01L21/283 ,  H01L21/311

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US20200291511A1

公开(公告)日：2020-09-17

申请号：US16676017

申请日：2019-11-06

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  C23C16/06 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  C23C16/56 ,  H01L21/768 ,  H01L21/285

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US20200266096A1

公开(公告)日：2020-08-20

申请号：US16773064

申请日：2020-01-27

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  C23C16/56 ,  C23C16/34 ,  C23C16/04 ,  C23C16/455 ,  C23C16/00 ,  H01L21/311 ,  H01L21/02 ,  H01L23/532

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US20200266054A1

公开(公告)日：2020-08-20

申请号：US16773635

申请日：2020-01-27

Applicant: ASM IP Holding B.V.

Inventor： Suvi P. Haukka ,  Fu Tang ,  Michael E. Givens ,  Jan Willem Maes ,  Qi Xie

IPC: H01L21/02 ,  H01L29/267 ,  H01L29/778 ,  H01L21/28

Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

公开(公告)号：US10566185B2

公开(公告)日：2020-02-18

申请号：US14819274

申请日：2015-08-05

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen

IPC: H01L21/02 ,  H01L21/283 ,  H01L21/311

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US10553482B2

公开(公告)日：2020-02-04

申请号：US16158780

申请日：2018-10-12

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L23/532 ,  C23C16/00

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US10480064B2

公开(公告)日：2019-11-19

申请号：US16040844

申请日：2018-07-20

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768 ,  C23C16/06 ,  C23C16/34 ,  C23C16/44 ,  C23C16/56

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US20190259605A1

公开(公告)日：2019-08-22

申请号：US16253759

申请日：2019-01-22

Applicant: ASM IP Holding B.V.

Inventor： Suvi P. Haukka ,  Fu Tang ,  Michael E. Givens ,  Jan Willem Maes ,  Qi Xie

IPC: H01L21/02 ,  H01L29/778 ,  H01L29/267 ,  H01L21/28

Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

公开(公告)号：US20190163056A1

公开(公告)日：2019-05-30

申请号：US16167164

申请日：2018-10-22

Applicant: ASM IP Holding B.V.

Inventor： Jan Willem Maes ,  Krzysztof Kamil Kachel ,  David Kurt de Roest

IPC: G03F7/004 ,  G03F7/20 ,  G03F7/16

Abstract: The method relates to a method of forming an enhanced unexposed photoresist layer from an unexposed photoresist layer on a substrate by increasing the sensitivity of the unexposed photoresist to exposure radiation. The method comprises: providing the substrate with the unexposed photoresist layer in a reaction chamber; providing a first precursor comprising a portion of a photosensitizer sensitive to exposure radiation in the reaction chamber; and, infiltrating the unexposed photoresist layer on the substrate with the first precursor.

公开(公告)号：US20190103303A1

公开(公告)日：2019-04-04

申请号：US16158780

申请日：2018-10-12

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  C23C16/00 ,  H01L23/532

CPC classification number: H01L21/7685 ,  C23C16/00 ,  C23C16/04 ,  C23C16/34 ,  C23C16/45527 ,  C23C16/56 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/76834 ,  H01L21/76897 ,  H01L23/53266

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.