公开(公告)号：US10121699B2

公开(公告)日：2018-11-06

申请号：US15432263

申请日：2017-02-14

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L23/532 ,  H01L21/283

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US20180190793A1

公开(公告)日：2018-07-05

申请号：US15394571

申请日：2016-12-29

Applicant: ASM IP Holding B.V.

Inventor： Harald Profijt ,  Qi Xie ,  Jan Willem Maes ,  David Kohen

IPC: H01L29/66 ,  H01L29/161 ,  H01L29/10 ,  H01L29/06 ,  H01L21/223

CPC classification number: H01L21/225 ,  H01L21/223 ,  H01L21/2251 ,  H01L21/2256 ,  H01L21/385 ,  H01L21/76858 ,  H01L29/0676 ,  H01L29/1033 ,  H01L29/161 ,  H01L29/66666

Abstract: In some embodiments, a compound semiconductor is formed by diffusion of semiconductor species from a source semiconductor layer into semiconductor material in a substrate. The source semiconductor layer may be an amorphous or polycrystalline structure, and provides a source of semiconductor species for later diffusion into the other semiconductor material. Advantageously, such a semiconductor layer may be more conformal than an epitaxially grown, crystalline semiconductor layer. As a result, this more conformal semiconductor layer acts as a uniform source of the semiconductor species for diffusion into the semiconductor material in the substrate. In some embodiments, an interlayer is formed between the source semiconductor layer and the substrate, and then the interlayer is trimmed before depositing the source semiconductor layer. In some other embodiments, the source semiconductor layer is deposited directly on the substrate, and has an amorphous or polycrystalline structure.

公开(公告)号：US10903113B2

公开(公告)日：2021-01-26

申请号：US16773064

申请日：2020-01-27

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L23/532 ,  C23C16/455 ,  C23C16/04 ,  C23C16/34 ,  C23C16/56 ,  C23C16/00

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US10141189B2

公开(公告)日：2018-11-27

申请号：US15394571

申请日：2016-12-29

Applicant: ASM IP Holding B.V.

Inventor： Harald Profijt ,  Qi Xie ,  Jan Willem Maes ,  David Kohen

IPC: H01L21/225 ,  H01L29/66 ,  H01L29/161 ,  H01L29/10 ,  H01L29/06 ,  H01L21/223 ,  H01L21/768 ,  H01L21/385

Abstract: In some embodiments, a compound semiconductor is formed by diffusion of semiconductor species from a source semiconductor layer into semiconductor material in a substrate. The source semiconductor layer may be an amorphous or polycrystalline structure, and provides a source of semiconductor species for later diffusion into the other semiconductor material. Advantageously, such a semiconductor layer may be more conformal than an epitaxially grown, crystalline semiconductor layer. As a result, this more conformal semiconductor layer acts as a uniform source of the semiconductor species for diffusion into the semiconductor material in the substrate. In some embodiments, an interlayer is formed between the source semiconductor layer and the substrate, and then the interlayer is trimmed before depositing the source semiconductor layer. In some other embodiments, the source semiconductor layer is deposited directly on the substrate, and has an amorphous or polycrystalline structure.

公开(公告)号：US20170154806A1

公开(公告)日：2017-06-01

申请号：US15432263

申请日：2017-02-14

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/311 ,  H01L23/532 ,  H01L21/02

CPC classification number: H01L21/7685 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/283 ,  H01L21/31122 ,  H01L21/31144 ,  H01L23/53266

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US20200266096A1

公开(公告)日：2020-08-20

申请号：US16773064

申请日：2020-01-27

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  C23C16/56 ,  C23C16/34 ,  C23C16/04 ,  C23C16/455 ,  C23C16/00 ,  H01L21/311 ,  H01L21/02 ,  H01L23/532

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US10553482B2

公开(公告)日：2020-02-04

申请号：US16158780

申请日：2018-10-12

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L23/532 ,  C23C16/00

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US20190103303A1

公开(公告)日：2019-04-04

申请号：US16158780

申请日：2018-10-12

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  C23C16/00 ,  H01L23/532

CPC classification number: H01L21/7685 ,  C23C16/00 ,  C23C16/04 ,  C23C16/34 ,  C23C16/45527 ,  C23C16/56 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/76834 ,  H01L21/76897 ,  H01L23/53266

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.