公开(公告)号：US20120042120A1

公开(公告)日：2012-02-16

申请号：US13280193

申请日：2011-10-24

申请人： Jim Chin-Nan Ni ,  David Q. Chow ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  David Q. Chow ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/00 ,  G06F13/42

CPC分类号： G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087 ,  Y02D10/13

摘要： An extended Universal-Serial-Bus (USB) connector plug and socket each have a pin substrate with one surface that supports the four metal contact pins for the standard USB interface. An extension of the pin substrate carries another 8 extension metal contact pins that mate when both the connector plug and socket are extended. The extension can be an increased length of the plug's and socket's pin substrate or a reverse side of the substrate. Standard USB connectors do not make contact with the extension metal contacts that are recessed, retracted by a mechanical switch, or on the extension of the socket's pin substrate that a standard USB connector cannot reach. Standard USB sockets do not make contact with the extension metal contacts because the extended connector's extension contacts are recessed, or on the extension of the connector pin substrate that does not fit inside a standard USB socket.

摘要翻译： 扩展的通用串行总线（USB）连接器插头和插座每个都具有一个引脚基板，一个表面支持用于标准USB接口的四个金属触点引脚。 当两个连接器插头和插座都延伸时，针脚衬底的延伸部分带有另外8个延伸金属接触针。 扩展可以是插头和插座的引脚基板或基板的相反侧的增加的长度。 标准USB连接器不能与通过机械开关凹入，缩回的扩展金属触点或标准USB连接器无法到达的插座引脚基板延伸部分接触。 由于扩展连接器的扩展触点凹进，或者连接器针脚基座的延伸部分不符合标准USB插座，因此标准USB插座不会与延长金属触点接触。

公开(公告)号：US07934074B2

公开(公告)日：2011-04-26

申请号：US11871011

申请日：2007-10-11

申请人： Charles C. Lee ,  Frank Yu ,  Ming-Shiang Shen ,  Abraham C. Ma ,  David Q. Chow

发明人： Charles C. Lee ,  Frank Yu ,  Ming-Shiang Shen ,  Abraham C. Ma ,  David Q. Chow

IPC分类号： G06F12/06

CPC分类号： G06F12/0246 ,  G06F12/0607 ,  G06F2212/7201 ,  G06F2212/7208 ,  G11C11/5621 ,  G11C16/0408

摘要： A flash memory controller on a PCIE bus controls flash-memory modules on a flash bus. The flash-memory modules are plane-interleaved using interleaved bits extracted from the lowest bits of the logical block index. These plane-interleave bits are split into a LSB and a MSB, with middle physical block bits between the LSB and MSB. A physical sequential address counter generates a physical block number by incrementing the plane-interleave bits before the middle physical block bits, and then relocating the MSB to above the middle physical block bits. This causes blocks to be accessed in a low-high sequence of 0, 1, 4096, 4097, 2, 3, 4098, 4099, etc. in the four planes of flash memory. A RAM physical page valid table tracks valid pages in the four planes, while a RAM mapping table stores the plane, block, and page addresses for logical sectors generated by the physical sequential address counter.

摘要翻译： PCIE总线上的闪存控制器控制闪存总线上的闪存模块。 闪存模块使用从逻辑块索引的最低位提取的交错比特进行平面交织。 这些平面交织位分为LSB和MSB，LSB与MSB之间的中间物理块位。 物理顺序地址计数器通过在中间物理块比特之前递增平面交织比特，然后将MSB重新定位到中间物理块比特之上来生成物理块号。 这导致在闪存的四个平面中以0,1,4096,4097,2,3,40,40,4099等的低高序列访问块。 RAM物理页有效表跟踪四个平面中的有效页面，而RAM映射表存储由物理顺序地址计数器生成的逻辑扇区的平面，块和页面地址。

公开(公告)号：US07707321B2

公开(公告)日：2010-04-27

申请号：US11928124

申请日：2007-10-30

申请人： Charles C. Lee ,  David Q. Chow ,  Abraham C. Ma ,  Frank Yu ,  Ming-Shiang Shen ,  Horng-Yee Chou

发明人： Charles C. Lee ,  David Q. Chow ,  Abraham C. Ma ,  Frank Yu ,  Ming-Shiang Shen ,  Horng-Yee Chou

IPC分类号： G06F3/00 ,  G06F13/38

CPC分类号： G06F13/28 ,  Y02D10/14

摘要： An extended Universal-Serial Bus (EUSB) host has reduced loading by using radio frequency (RF) transceivers or direct wiring traces rather than a pair of legacy USB cables. The reduced loading opens the eye pattern. The EUSB device transfers internal data using chained Direct-Memory Access (DMA). Registers in a DMA controller point to a vector table that has vector entries, each pointing to a destination and a source. The source is a memory table for a memory group. The memory table has entries for several memory segments. Each memory-table entry has a pointer to a memory segment and a byte count for the segment. Once all bytes in the segment are transferred, a flag in the entry indicates when another memory segment follows within the memory group. When an END flag is read, then vector table is advanced to the next vector entry, and another memory group of memory segments processed.

摘要翻译： 扩展的通用串行总线（EUSB）主机通过使用射频（RF）收发器或直接布线轨迹而不是一对传统的USB电缆减少了负载。 减少负荷打开眼睛图案。 EUSB设备使用链接的直接内存访问（DMA）传输内部数据。 DMA控制器中的寄存器指向具有向量条目的向量表，每个向量表指向一个目的地和一个源。 源是内存组的内存表。 内存表有几个内存段的条目。 每个存储表条目具有指向存储器段的指针和段的字节计数。 一旦片段中的所有字节都被传送，该条目中的标志表示在存储器组中跟随其他内存段的时间。 读取END标志时，向量表前进到下一个向量条目，并处理另一个内存段的内存组。

公开(公告)号：US20100082893A1

公开(公告)日：2010-04-01

申请号：US12631761

申请日：2009-12-04

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F12/10

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US20100082892A1

公开(公告)日：2010-04-01

申请号：US12631748

申请日：2009-12-04

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input— output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US20100030961A9

公开(公告)日：2010-02-04

申请号：US11466759

申请日：2006-08-23

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US07576990B2

公开(公告)日：2009-08-18

申请号：US11683292

申请日：2007-03-07

申请人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H05K1/14

CPC分类号： H05K5/0269 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087 ,  H05K5/026

摘要： A case-grounded flash-memory drive has a printed-circuit board assembly (PCBA) with flash-memory chips and a controller chip. The PCBA is encased inside an upper case and a lower case, with a Serial AT-Attachment (SATA) connector that fits through and opening between the cases. The cases can be assembled with the PCBA by a snap-together, ultrasonic-press, screw-fastener, or thermal-bond adhesive method. Dual-axis case-grounding pins draw any electro-static-discharges (ESD) current off the upper case along a primary axis and onto a PCBA ground through a secondary axis washer that is screwed into the PCBA. The primary axis body of the dual-axis case-grounding pins fits around a PCBA notch while the secondary axis passes through a metalized alignment hole for grounding. When the SATA connector is inserted into a host, the host ground sinks ESD currents collected by the dual-axis case-grounding pins.

摘要翻译： 外壳接地闪存驱动器具有带闪存芯片的印刷电路板组件（PCBA）和控制器芯片。 PCBA被封装在上壳体和下壳体内，并具有穿过并在壳体之间打开的串行AT附件（SATA）连接器。 这些情况可以通过卡扣，超声波压力机，螺纹紧固件或热粘合粘合剂方法与PCBA组装。 双轴外壳接地引脚通过螺纹连接到PCBA中的次轴垫圈将初始轴上的任何静电放电（ESD）电流从主轴上吸入PCBA接地。 双轴壳体 - 接地销的主轴体装配在PCBA槽口周围，而副轴线穿过金属化的对准孔进行接地。 当SATA连接器插入主机时，主机接地将吸收由双轴外壳接地引脚收集的ESD电流。

公开(公告)号：US07517252B2

公开(公告)日：2009-04-14

申请号：US11966827

申请日：2007-12-28

申请人： Jim Chin-Nan Ni ,  Siew Sin Hiew ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Siew Sin Hiew ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

IPC分类号： H01R24/00

CPC分类号： H05K5/0256

摘要： Thin solid state drive (SSD) housing structures are described. According to one embodiment of the invention, a structure for housing an SSD includes a pair of brackets configured to support a PCBA of the SSD at either side of the PCBA via one or more ledges with corresponding fastener holes pre-configured thereon. The ledges are attached to inside surface of the brackets. Each of the brackets has a slab shape with a length and a height. The length is parallel to horizontal direction, while the height parallel to vertical. The ledges are located at mid-height and orientated substantially perpendicular to the brackets such that the PCBA is supported horizontally. In order to securely connect the PCBA with the brackets, a plurality of metal fasteners is used. The fasteners are placed through the fastener holes on the ledges and through corresponding alignment holes pre-configured on the PCBA.

摘要翻译： 描述了薄的固态驱动器（SSD）外壳结构。 根据本发明的一个实施例，用于容纳SSD的结构包括一对支架，其被配置为经由一个或多个突出部支撑在PCBA的任一侧的SSD的PCBA，其中预定配置有相应的紧固件孔。 凸缘连接到支架的内表面。 每个托架具有长度和高度的板形。 长度平行于水平方向，高度平行于垂直方向。 凸缘位于中间高度并且基本上垂直于支架定向，使得PCBA水平地支撑。 为了将PCBA与支架牢固连接，使用多个金属紧固件。 紧固件通过凸缘上的紧固件孔并通过预先配置在PCBA上的相应对准孔放置。

公开(公告)号：US07507119B2

公开(公告)日：2009-03-24

申请号：US11309847

申请日：2006-10-12

申请人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H01R13/648

CPC分类号： H01R13/6658 ,  H01R13/7175 ,  H05K5/0278

摘要： A Universal-Serial-Bus (USB) device has a USB plug with reduced wobble. A USB metal wrap around the perimeter of the USB plug is attached to a housing by overmolding. A plug supporter is inserted into the front of the USB metal wrap, and has locking tabs that snap over the inside wall of the housing. Side tabs on the plug supporter fit into side slots on the USB metal wrap to secure the plug supporter inside the USB metal wrap. A circuit board with a USB flash controller has USB metal contacts on an extension end that is inserted through the housing and into the USB metal wrap. The extension end fits underneath top tabs on the plug supporter, preventing the extension end with the USB metal contacts from upward wobble when the USB plug is inserted into a USB socket.

摘要翻译： 通用串行总线（USB）设备具有减少摆动的USB插头。 围绕USB插头的周边的USB金属包裹通过包覆成型附接到外壳。 插头支撑件插入USB金属包装的前部，并具有卡在外壳内壁上的锁定片。 插头支架上的侧面接头装配在USB金属外壳上的侧插槽中，以将插头支撑件固定在USB金属包装内。 带有USB闪存控制器的电路板在扩展端有USB金属触点，插入通过外壳和USB金属外壳。 延长端配合在插头支架上的顶部卡舌下方，当USB插头插入USB插座时，防止USB金属触点的延伸端向上摆动。

公开(公告)号：US20080313388A1

公开(公告)日：2008-12-18

申请号：US11929776

申请日：2007-10-30

申请人： David Q. Chow ,  Frank I. Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Frank I. Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/7202 ,  G06F2212/7208 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.