公开(公告)号：US20090191652A1

公开(公告)日：2009-07-30

申请号：US12081515

申请日：2008-04-17

Applicant: Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Chin-Yueh Liao

Inventor： Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Chin-Yueh Liao

IPC: H01L27/02 ,  H01L21/70

CPC classification number: H01L29/458 ,  H01L27/124 ,  H01L27/1288

Abstract: A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.

Abstract translation: 像素结构包括扫描线，数据线，有源元件，第一钝化层，第二钝化层和像素电极。 数据线包括第一数据金属段和第二数据金属层。 有源元件包括栅电极，绝缘层，沟道层，源极和漏极。 沟道层位于栅电极上方的绝缘层上。 源极和漏极位于沟道层上。 源耦合到数据线。 第一钝化层和第二钝化层覆盖有源元件并形成第一接触孔以暴露漏极的一部分。 第二钝化层覆盖漏极的一部分边缘。 像素电极跨越第二钝化层设置并且经由第一接触孔耦合到漏极。

公开(公告)号：US20090166634A1

公开(公告)日：2009-07-02

申请号：US12177882

申请日：2008-07-23

Applicant: Hsiang-Lin Lin ,  Chun-Chieh Tsao

Inventor： Hsiang-Lin Lin ,  Chun-Chieh Tsao

IPC: H01L29/04 ,  H01L21/336

CPC classification number: G02F1/133555 ,  G02F1/136227 ,  H01L27/124 ,  H01L27/1248

Abstract: A pixel structure including a gate, a gate dielectric layer, a patterned semiconductor layer having a channel area disposed above the gate, a patterned dielectric layer having an etching-stop layer disposed above the gate and a number of bumps, a patterned metal layer having a reflective pixel electrode, a source and a drain, an overcoat dielectric layer, and a transparent pixel electrode sequentially disposed on a substrate is provided. The source and the drain respectively cover portions of the channel area. The reflective pixel electrode connects the drain and covers the bumps to form an uneven surface. The overcoat dielectric layer disposed on a transistor constituted by the gate, the gate dielectric layer, the patterned semiconductor layer, the source and the drain has a contact opening exposing a portion of the reflective pixel electrode. The transparent pixel electrode is electrically connected to the reflective pixel electrode through the contact opening.

Abstract translation: 一种像素结构，包括栅极，栅极电介质层，具有设置在栅极上方的沟道区域的图案化半导体层，具有设置在栅极上方的蚀刻停止层和多个凸起的图案化电介质层，具有 提供反射像素电极，源极和漏极，外涂层电介质层和顺序地设置在基板上的透明像素电极。 源极和漏极分别覆盖沟道区域的部分。 反射像素电极连接漏极并覆盖凸块以形成不平坦的表面。 设置在由栅极，栅极电介质层，图案化半导体层，源极和漏极构成的晶体管上的外涂层电介质层具有暴露反射像素电极的一部分的接触开口。 透明像素电极通过接触开口电连接到反射像素电极。

公开(公告)号：US20080182350A1

公开(公告)日：2008-07-31

申请号：US11964758

申请日：2007-12-27

Applicant: Hsiang-Lin Lin

Inventor： Hsiang-Lin Lin

IPC: H01L33/00

CPC classification number: H01L27/1248 ,  G02F2001/136231 ,  H01L27/1288 ,  H01L51/56 ,  H01L2227/323 ,  Y10S438/958

Abstract: A method for fabricating a pixel structure of a liquid crystal device is provided. The method comprises providing a substrate defining a thin film transistor (TFT) region and a display region thereon. An opaque conductive layer is formed on the TFT region, and a transparent pixel electrode is formed on the display region. A patterned photoresist passivation layer is formed by backside exposure process on the TFT region, wherein the opaque conductive layer serves as the photo-mask during the backside exposure process. The photoresist passivation layer is subjected to a middle bake process to be reflowed, resulting in a complete covering of the opaque conductive layer.

Abstract translation: 提供一种用于制造液晶装置的像素结构的方法。 该方法包括提供限定薄膜晶体管（TFT）区域的基板和其上的显示区域。 在TFT区域上形成不透明导电层，在显示区域上形成透明像素电极。 在TFT区域上通过背面曝光工艺形成图案化的光致抗蚀剂钝化层，其中不透明导电层在背面曝光工艺期间用作光掩模。 对光致抗蚀剂钝化层进行中间烘烤处理以回流，导致不透明导电层的完全覆盖。

公开(公告)号：US09251742B2

公开(公告)日：2016-02-02

申请号：US13439976

申请日：2012-04-05

Applicant: Ping-Sheng Kuo ,  Hsiang-Lin Lin ,  Chih-Cheng Chan ,  Sheng-Wen Huang

Inventor： Ping-Sheng Kuo ,  Hsiang-Lin Lin ,  Chih-Cheng Chan ,  Sheng-Wen Huang

IPC: G09G3/34

CPC classification number: G09G3/344 ,  G09G2310/0275 ,  G09G2310/0281

Abstract: An electrophoretic display apparatus and an image-updating method thereof are provided. The electrophoretic display apparatus comprises a display panel and a source driver. The display panel comprises a plurality of pixels and a plurality of source lines, and each pixel electrode is electrically coupled to an AC common voltage through a corresponding capacitor. The capacitor comprises a plurality of charged particles. The source driver comprises a first data-latching circuit and a second data-latching circuit. Each of the data-latching circuits comprises a transistor, a capacitor and an inverter. The first data-latching circuit receives image data and a data shift-register output pulse. The second data-latching circuit is electrically coupled between an output terminal of the first data-latching circuit and a source line and is used for receiving a data output pulse.

Abstract translation: 提供一种电泳显示装置及其图像更新方法。 电泳显示装置包括显示面板和源驱动器。 显示面板包括多个像素和多个源极线，并且每个像素电极通过相应的电容器电耦合到AC公共电压。 电容器包括多个带电粒子。 源极驱动器包括第一数据锁存电路和第二数据锁存电路。 每个数据锁存电路包括晶体管，电容器和反相器。 第一数据锁存电路接收图像数据和数据移位寄存器输出脉冲。 第二数据锁存电路电耦合在第一数据锁存电路的输出端和源极线之间，用于接收数据输出脉冲。

公开(公告)号：US08519994B2

公开(公告)日：2013-08-27

申请号：US12861851

申请日：2010-08-24

Applicant: Chung-Hsiang Chiu ,  Hsiang-Lin Lin ,  Chung-Yi Chang ,  Sheng-Wen Huang ,  Chih-Jen Hu

Inventor： Chung-Hsiang Chiu ,  Hsiang-Lin Lin ,  Chung-Yi Chang ,  Sheng-Wen Huang ,  Chih-Jen Hu

IPC: G09G5/00 ,  G09G3/36

CPC classification number: G09G5/00 ,  G09G3/34

Abstract: A method of driving an electrophoretic display is set forth for avoiding image-edge residual while sequentially displaying a first frame and a second frame. During the time of displaying the first frame, set a common voltage to be a first voltage, apply a second voltage different from the first voltage to a first pixel for writing a first data signal into the first pixel, and apply the first voltage to a second pixel adjacent to the first pixel for retaining a second data signal of the second pixel, which is different from the first data signal. During the time of displaying the second frame, set the common voltage to be the second voltage, apply the first voltage to the first pixel for writing the second data signal into the first pixel, and apply the first voltage to the second pixel for retaining the second data signal of the second pixel.

Abstract translation: 阐述了驱动电泳显示器的方法，以便在顺序地显示第一帧和第二帧的同时避免图像边缘残差。 在显示第一帧期间，将公共电压设置为第一电压，将不同于第一电压的第二电压施加到第一像素，以将第一数据信号写入第一像素，并将第一电压施加到 与第一像素相邻的第二像素，用于保持与第一数据信号不同的第二像素的第二数据信号。 在显示第二帧期间，将公共电压设置为第二电压，将第一电压施加到第一像素，以将第二数据信号写入第一像素，并将第一电压施加到第二像素，以保持第 第二像素的第二数据信号。

公开(公告)号：US08488086B2

公开(公告)日：2013-07-16

申请号：US13136511

申请日：2011-08-02

Applicant: Hsiang-Lin Lin ,  Chun-Chieh Tsao

Inventor： Hsiang-Lin Lin ,  Chun-Chieh Tsao

IPC: G02F1/1335

CPC classification number: G03F7/40 ,  G02F1/133504 ,  G02F1/133555 ,  G02F2201/123 ,  G03F7/0007 ,  H01R13/6675 ,  H02J7/0068 ,  Y10T307/625 ,  Y10T428/1068

Abstract: A method for producing a light reflecting structure in a transflective or reflective liquid crystal display uses one or two masks for masking a photoresist layer in a back-side exposing process. The pattern on the masks is designed to produce rod-like structures or crevices and holes on exposed and developed photoresist layer. After the exposed photoresist is developed, a heat treatment process or a UV curing process is used to soften the photoresist layer so that the reshaped surface is more or less contiguous but uneven. A reflective coating is then deposited on the uneven surface. One or more intermediate layers can be made between the masks, between the lower mask and the substrate, and between the upper masks and the photoresist layers. The masks and the intermediate layers can be made in conjunction with the fabrication of the liquid crystal display panel.

Abstract translation: 在半反射或反射型液晶显示器中制造光反射结构的方法使用一个或两个掩模来掩模背面曝光工艺中的光致抗蚀剂层。 掩模上的图案被设计成在曝光和显影的光致抗蚀剂层上产生棒状结构或缝隙和孔。 曝光的光致抗蚀剂显影后，使用热处理工艺或UV固化工艺来软化光致抗蚀剂层，使得整形表面或多或少地连续但不均匀。 然后将反射涂层沉积在不平坦表面上。 可以在掩模之间，下掩模和基板之间以及上掩模和光致抗蚀剂层之间形成一个或多个中间层。 掩模和中间层可以与液晶显示面板的制造相结合。

公开(公告)号：US20120268442A1

公开(公告)日：2012-10-25

申请号：US13439976

申请日：2012-04-05

Applicant: Ping-Sheng Kuo ,  Hsiang-Lin Lin ,  Chih-Cheng Chan ,  Sheng-Wen Huang

Inventor： Ping-Sheng Kuo ,  Hsiang-Lin Lin ,  Chih-Cheng Chan ,  Sheng-Wen Huang

IPC: G09G3/34 ,  G06F3/038

CPC classification number: G09G3/344 ,  G09G2310/0275 ,  G09G2310/0281

Abstract: An electrophoretic display apparatus and an image-updating method thereof are provided. The electrophoretic display apparatus comprises a display panel and a source driver. The display panel comprises a plurality of pixels and a plurality of source lines, and each pixel electrode is electrically coupled to an AC common voltage through a corresponding capacitor. The capacitor comprises a plurality of charged particles. The source driver comprises a first data-latching circuit and a second data-latching circuit. Each of the data-latching circuits comprises a transistor, a capacitor and an inverter. The first data-latching circuit receives image data and a data shift-register output pulse. The second data-latching circuit is electrically coupled between an output terminal of the first data-latching circuit and a source line and is used for receiving a data output pulse.

Abstract translation: 提供一种电泳显示装置及其图像更新方法。 电泳显示装置包括显示面板和源驱动器。 显示面板包括多个像素和多个源极线，并且每个像素电极通过相应的电容器电耦合到AC公共电压。 电容器包括多个带电粒子。 源极驱动器包括第一数据锁存电路和第二数据锁存电路。 每个数据锁存电路包括晶体管，电容器和反相器。 第一数据锁存电路接收图像数据和数据移位寄存器输出脉冲。 第二数据锁存电路电耦合在第一数据锁存电路的输出端和源极线之间，并用于接收数据输出脉冲。

公开(公告)号：US20110216055A1

公开(公告)日：2011-09-08

申请号：US12861851

申请日：2010-08-24

Applicant: Chung-Hsiang Chiu ,  Hsiang-Lin Lin ,  Chung-Yi Chang ,  Sheng-Wen Huang ,  Chih-Jen Hu

Inventor： Chung-Hsiang Chiu ,  Hsiang-Lin Lin ,  Chung-Yi Chang ,  Sheng-Wen Huang ,  Chih-Jen Hu

IPC: G09G5/00 ,  G09G3/34

CPC classification number: G09G5/00 ,  G09G3/34

Abstract: A method of driving an electrophoretic display is set forth for avoiding image-edge residual while sequentially displaying a first frame and a second frame. During the time of displaying the first frame, set a common voltage to be a first voltage, apply a second voltage different from the first voltage to a first pixel for writing a first data signal into the first pixel, and apply the first voltage to a second pixel adjacent to the first pixel for retaining a second data signal of the second pixel, which is different from the first data signal. During the time of displaying the second frame, set the common voltage to be the second voltage, apply the first voltage to the first pixel for writing the second data signal into the first pixel, and apply the first voltage to the second pixel for retaining the second data signal of the second pixel.

Abstract translation: 阐述了驱动电泳显示器的方法，以便在顺序地显示第一帧和第二帧的同时避免图像边缘残差。 在显示第一帧的时间期间，将公共电压设置为第一电压，将不同于第一电压的第二电压施加到第一像素，以将第一数据信号写入第一像素，并将第一电压施加到 与第一像素相邻的第二像素，用于保持与第一数据信号不同的第二像素的第二数据信号。 在显示第二帧期间，将公共电压设置为第二电压，将第一电压施加到第一像素，以将第二数据信号写入第一像素，并将第一电压施加到第二像素，以保持第 第二像素的第二数据信号。

公开(公告)号：US07951629B2

公开(公告)日：2011-05-31

申请号：US12704537

申请日：2010-02-12

Applicant: Hsiang-Lin Lin ,  Sung-Kao Liu

Inventor： Hsiang-Lin Lin ,  Sung-Kao Liu

IPC: H01L21/00

CPC classification number: G02F1/136227 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2001/136218

Abstract: A method of manufacturing a pixel structure is provided. A first patterned conductive layer including a gate and a data line is formed on a substrate. A gate insulating layer is formed to cover the first patterned conductive layer and a semiconductor channel layer is formed on the gate insulating layer above the gate. A second patterned conductive layer including a scan line, a common line, a source and a drain is formed on the gate insulating layer and the semiconductor channel layer. The scan line is connected to the gate and the common line is located above the data line. The source and drain are located on the semiconductor channel layer, and the source is connected to the data line. A passivation layer is formed on the substrate to cover the second patterned conductive layer. A pixel electrode connected to the drain is formed on the passivation layer.

Abstract translation: 提供了一种制造像素结构的方法。 在基板上形成包括栅极和数据线的第一图案化导电层。 形成栅极绝缘层以覆盖第一图案化导电层，并且在栅极上方的栅极绝缘层上形成半导体沟道层。 包括扫描线，公共线，源极和漏极的第二图案化导电层形成在栅极绝缘层和半导体沟道层上。 扫描线连接到栅极，公共线位于数据线上方。 源极和漏极位于半导体沟道层上，源极连接到数据线。 在衬底上形成钝化层以覆盖第二图案化导电层。 连接到漏极的像素电极形成在钝化层上。

公开(公告)号：US20100213464A1

公开(公告)日：2010-08-26

申请号：US12775493

申请日：2010-05-07

Applicant: Wei-Sheng Yu ,  Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Hsien-Chieh Tseng ,  Han-Tu Lin

Inventor： Wei-Sheng Yu ,  Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Hsien-Chieh Tseng ,  Han-Tu Lin

IPC: H01L33/16

CPC classification number: H01L27/124 ,  H01L27/1248 ,  H01L27/1288

Abstract: An active matrix array structure, disposed on a substrate, includes a first patterned conductive layer, a patterned gate insulating layer, a patterned semiconductor layer, a second patterned conductive layer, a patterned overcoat layer and a transparent conductive layer. The patterned gate insulating layer has first openings that expose a part of the first patterned conductive layer. The patterned semiconductor layer is disposed on the patterned gate insulating layer. The second patterned conductive layer is disposed on the patterned semiconductor layer. The patterned overcoat layer has second openings that expose a part of the first patterned conductive layer and a part of the second patterned conductive layer. The transparent conductive layer is completely disposed on the substrate. The transparent conductive layer disposed in the first openings and the second openings is broken off at a position that is in between the substrate and the patterned overcoat layer.

Abstract translation: 设置在基板上的有源矩阵阵列结构包括第一图案化导电层，图案化栅极绝缘层，图案化半导体层，第二图案化导电层，图案化外涂层和透明导电层。 图案化栅极绝缘层具有暴露第一图案化导电层的一部分的第一开口。 图案化的半导体层设置在图案化的栅极绝缘层上。 第二图案化导电层设置在图案化的半导体层上。 图案化的外涂层具有暴露第一图案化导电层的一部分和第二图案化导电层的一部分的第二开口。 透明导电层完全设置在基板上。 设置在第一开口和第二开口中的透明导电层在基板和图案化外涂层之间的位置处断开。