-
公开(公告)号：US08612839B2
公开(公告)日：2013-12-17
申请号：US13563115
申请日：2012-07-31
IPC分类号： G06F11/00
CPC分类号： H03M13/356 , G06F11/1012 , H03M13/15 , H03M13/1515
摘要： A data protection method is provided that includes determining a compressibility score of one or more lines of data stored in a memory. The memory includes a first area characterized by a first reliability level and a second area characterized by a second reliability level. Lines of data with a first compressibility score are migrated to the first area of the memory. Lines of data with a second compressibility score are migrated to the second area of the memory.
摘要翻译： 提供了一种数据保护方法，其包括确定存储在存储器中的一行或多行数据的可压缩性分数。 存储器包括以第一可靠性水平为特征的第一区域和以第二可靠性水平为特征的第二区域。 具有第一可压缩性分数的数据行被迁移到存储器的第一区域。 具有第二压缩性分数的数据行被迁移到存储器的第二区域。
-
公开(公告)号：US20130318423A1
公开(公告)日：2013-11-28
申请号：US13479855
申请日：2012-05-24
CPC分类号： G06F11/1008 , H03M13/1515
摘要： An embodiment is a method for encoding data with an error correction code. The method includes receiving a first number of data symbols by a memory controller, receiving a second number of meta-data sub-symbols, generating a third number of check symbols using an ECC, where the third number includes a difference between a number of symbols in an ECC codeword and the first number and generating a mismatch vector from the check and meta-data sub-symbols, where a number of sub-symbols of the mismatch vector includes the second number. The method also includes generating an adjustment syndrome symbol by multiplying the mismatch vector by a matrix, generating the third number of adjusted check symbols responsive to the adjustment syndrome symbol, and generating a final codeword by concatenating the adjusted check symbols and the data symbols, where the final codeword includes the number of symbols in the ECC codeword.
摘要翻译： 实施例是用纠错码对数据进行编码的方法。 该方法包括由存储器控制器接收第一数量的数据符号，接收第二数量的元数据子符号，使用ECC生成第三数量的校验符号，其中第三数字包括多个符号之间的差异 在ECC码字和第一数字中，并且从校验和元数据子符号生成不匹配向量，其中失配向量的子数目的数目包括第二数目。 该方法还包括通过将失配向量乘以矩阵来产生调整校正符号符号，响应于调整校正子符号产生第三数量的经调整的校验符号，以及通过连接调整的校验符号和数据符号来生成最终码字，其中 最终码字包括ECC码字中的符号数。
-
公开(公告)号：US08413004B2
公开(公告)日：2013-04-02
申请号：US13408407
申请日：2012-02-29
申请人： Michele Franceschini , John Peter Karidis , Luis A. Lastras-Montano , Thomas Mittelholzer , Mark N. Wegman
发明人： Michele Franceschini , John Peter Karidis , Luis A. Lastras-Montano , Thomas Mittelholzer , Mark N. Wegman
IPC分类号： G08C25/02 , H04L1/18 , H04H40/00 , H04W4/00 , H04W24/00 , H04B7/00 , G11C11/34 , G11C16/04 , G06M3/00
CPC分类号： G11C13/0069 , G06F11/1012 , G11C13/0002 , G11C2207/104
摘要： A phase-change memory (PCM) includes a matrix of storage cells, including at least a first group with at least one cell. Each cell includes a phase change material having at least a first resistance value and a second resistance value, such that the first group can have an identical message encoded therein in at least a first way and a second way. The memory also includes a controller configured to encode the identical message in the at least first group the first or second way, based on which way causes the least amount of writing cost, given current levels of the group. Another embodiment of memory includes a matrix of storage cells. Each of the storage cells has at least two levels, such that each of the storage cells can have an identical message encoded therein in at least a first way and a second way.
摘要翻译： 相变存储器（PCM）包括存储单元矩阵，至少包括具有至少一个单元的第一组。 每个单元包括具有至少第一电阻值和第二电阻值的相变材料，使得第一组可以以至少第一种方式和第二种方式在其中编码相同的消息。 所述存储器还包括控制器，所述控制器被配置为在所述至少第一组中对所述第一或第二方式的相同消息进行编码，基于哪种方式，给出所述组的当前级别的最小写入成本量。 存储器的另一实施例包括存储单元矩阵。 每个存储单元具有至少两个级别，使得每个存储单元可以以至少第一种方式和第二种方式在其中编码相同的消息。
-
94.发明申请公开(公告)号：US20130019029A1
公开(公告)日：2013-01-17
申请号：US13181860
申请日：2011-07-13
IPC分类号： G06F15/16
CPC分类号： H03M7/3068
摘要： Lossless compression of a data stream having mixed data types, including a method for receiving a data stream that includes a plurality of different types of bit groups. Bit groups of at least two different types are extracted from the data stream to form a sub-stream. Circular shifts of the sub-stream are generated and then sorted into a sorted list of circular shifts. A transformed string that includes a bit group from each of the circular shifts is extracted from the sorted list of circular shifts. A location in the transformed string of a bit group from a pre-determined location in the sub-stream is identified. The transformed string is partitioned between the at least two different types of bit groups into transformed string partitions, and the transformed string partitions are compressed to form compressed transformed string partitions. The compressed transformed string partitions and the location are output.
摘要翻译： 具有混合数据类型的数据流的无损压缩，包括用于接收包括多个不同类型的位组的数据流的方法。 从数据流中提取至少两种不同类型的比特组以形成子流。 生成子流的循环移位，然后将其排序为排序的循环移位列表。 从循环移位的排序列表中提取包括来自每个循环移位的位组的经变换的字符串。 识别来自子流中预定位置的位组的变换字符串中的位置。 将变换的字符串在至少两种不同类型的位组之间分割成变换的字符串分区，并且变换的字符串分区被压缩以形成压缩的变换字符串分区。 压缩的变换字符串分区和位置被输出。
-
公开(公告)号：US20120290778A1
公开(公告)日：2012-11-15
申请号：US13557294
申请日：2012-07-25
CPC分类号： G11C29/08 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0076 , G11C2211/5641
摘要： Providing increased capacity in heterogeneous storage elements including a method for storing data in a heterogeneous memory that includes receiving a write message and a write address corresponding to a block of memory cells where at least two of the memory cells support different data levels, determining physical characteristics of the memory cells, and identifying virtual memories associated with the block of memory cells in response to the physical characteristics. The following is performed for each of the virtual memories: generating a constraint vector that describes the virtual cells in the virtual memory; and calculating a virtual write vector in response to the constraint vector and the write data, the calculating including writing the write data, bit by bit, in order, into the virtual memory, skipping locations known to be stuck to a particular value as indicated by the constraint vector. The virtual write vectors are combined into a write word and the write word is output to the block of memory cells.
摘要翻译： 提供异构存储元件中的增加的容量，包括用于在异构存储器中存储数据的方法，该方法包括接收对应于其中至少两个存储器单元支持不同数据电平的存储器单元块的写入消息和写入地址，确定物理特性 并且响应于物理特性识别与存储器单元块相关联的虚拟存储器。 对每个虚拟存储器执行以下操作：生成描述虚拟存储器中的虚拟单元的约束向量; 以及响应于所述约束向量和所述写入数据计算虚拟写入向量，所述计算包括按顺序将所述写入数据逐位写入到所述虚拟存储器中，跳过已知被粘附到特定值的位置，如 约束向量。 虚拟写入向量被组合成写入字，并将写入字输出到存储器单元块。
-
96.发明申请CORRECTING MEMORY DEVICE AND MEMORY CHANNEL FAILURES IN THE PRESENCE OF KNOWN MEMORY DEVICE FAILURES 失效在存在的存储器件故障存在的情况下修正存储器件和存储器通道故障公开(公告)号：US20120198309A1
公开(公告)日：2012-08-02
申请号：US13016977
申请日：2011-01-29
CPC分类号： G06F11/10 , H03M13/13 , H03M13/1515 , H03M13/152 , H03M13/19
摘要： Correcting memory device (chip) and memory channel failures in the presence of known memory device failures. A memory channel failure is located and corrected, or alternatively up to c chip failures are corrected and up to d chip failures are detected in the presence of up to u chips that are marked as suspect. A first stage of decoding is performed that results in recovering an estimate of correctable errors affecting the data or in declaring an uncorrectable error state. When an uncorrectable error state is declared, a second stage of decoding is performed to attempt to correct u erasures and a channel error in M iterations where the channel location is changed in each iteration. A correctable error is declared in response to exactly one of the M iterations being successful.
摘要翻译： 在存在已知存储器件故障的情况下更正存储器件（芯片）和存储器通道故障。 存储器通道故障被定位和校正，或者高达c个芯片故障被校正，并且在存在被标记为可疑的最多u个芯片的情况下，检测到高达d个芯片故障。 执行解码的第一阶段，其导致恢复影响数据的可校正错误的估计或者宣告不可校正的错误状态。 当声明不可校正的错误状态时，执行第二级解码以尝试在每次迭代中改变通道位置的M次迭代中纠正擦除和通道错误。 响应正好一个M次迭代成功声明可纠正的错误。
-
97.发明申请CHANNEL MARKING FOR CHIP MARK OVERFLOW AND CALIBRATION ERRORS 有权CHANNEL MARKING FOR CHIP MARK OVERFLOW和CALIBRATION ERRORS公开(公告)号：US20120173936A1
公开(公告)日：2012-07-05
申请号：US12981017
申请日：2010-12-29
IPC分类号： G06F11/10
CPC分类号： G11C29/44 , G06F11/1044 , G06F11/1076 , G06F11/30 , G06F2211/1064
摘要： Marking memory chips as faulty when a fault is detected in data from the memory chip. Upon detecting that a plurality of memory chips are faulty, determining which of a plurality of memory channels contains the faulty memory chips. Marking one of a plurality of memory channels as failing in response to determining that the number of failing memory chips has exceeded a threshold.
摘要翻译： 当从存储器芯片的数据中检测到故障时，将存储器芯片标记为故障。 在检测到多个存储器芯片有故障时，确定多个存储器通道中的哪一个存储有故障的存储器芯片。 响应于确定故障存储器芯片的数量已经超过阈值，将多个存储器通道中的一个标记为失败。
-
98.发明授权Method and apparatus for cost-effective design of large-scale sensor networks 有权大规模传感器网络成本效益设计的方法和装置公开(公告)号：US08174989B2
公开(公告)日：2012-05-08
申请号：US11692874
申请日：2007-03-28
申请人： Akshay Kashyap , Luis A. Lastras-Montano , Zhen Liu , Honghui Xia
发明人： Akshay Kashyap , Luis A. Lastras-Montano , Zhen Liu , Honghui Xia
IPC分类号： H04L12/26
CPC分类号： H04L67/12
摘要： Arrangements and methods for developing a software toolkit that can be used to design or obtain parameters for a sensor network. High-level guidelines on the basic relations between sensor network parameters like number of sensors, degree of quantization at each sensor, and the distortion requirements, based on a deep analysis on two basic coding possibilities (multiplexed point-to-point, distributed) are contemplated. By evaluating tradeoffs among the various parameters, an optimization framework to obtain the most cost-effective design with required quantization capabilities pertaining to given distortion criterion is provided.
摘要翻译： 用于开发可用于设计或获取传感器网络参数的软件工具包的安排和方法。 基于对两种基本编码可能性（多点对点，分布式）的深入分析，关于传感器网络参数（如传感器数量，每个传感器的量化度）和失真要求之间的基本关系的高级指南是 预期。 通过评估各种参数之间的折衷，提供了一种优化框架，以获得具有与给定失真标准相关的所需量化能力的最具成本效益的设计。
-
公开(公告)号：US08171377B2
公开(公告)日：2012-05-01
申请号：US12023374
申请日：2008-01-31
IPC分类号： G11C29/00
CPC分类号： H03M13/1545 , G06F11/1044 , H03M13/1515
摘要： A system to improve memory reliability in computer systems that may include memory chips, and may rely on a error control encoder to send codeword symbols for storage in each of the memory chips. At least two symbols from a codeword are assigned to each memory chip and therefore failure of any of the memory chips could affect two symbols or more. The system may also include a table to record failures and partial failures of the codeword symbols for each of the memory chips so the error control encoder can correct subsequent partial failures based upon the previous partial failures. The error control coder is capable of correcting and/or detecting more errors if only a fraction of a chip is noted in the table as having a failure as opposed to a full chip noted as having a failure.
摘要翻译： 一种用于提高可能包括存储器芯片的计算机系统中的存储器可靠性的系统，并且可以依赖于错误控制编码器来发送用于存储在每个存储器芯片中的码字符号。 来自码字的至少两个符号被分配给每个存储器芯片，因此任何存储器芯片的故障可能影响两个或更多个符号。 该系统还可以包括用于记录每个存储器芯片的码字符号的故障和部分故障的表，因此错误控制编码器可以基于先前的部分故障来校正随后的部分故障。 误差控制编码器能够校正和/或检测更多的误差，如果在表中只有一部分芯片被注意为具有故障，而不是被称为具有故障的全芯片。
-
公开(公告)号：US20110320918A1
公开(公告)日：2011-12-29
申请号：US12822469
申请日：2010-06-24
CPC分类号： G06F11/1044 , G06F11/108 , H03M13/19 , H03M13/2906 , H03M13/3761
摘要： Error correction and detection in a redundant memory system including a a computer implemented method that includes receiving data including error correction code (ECC) bits, the receiving from a plurality of channels, each channel comprising a plurality of memory devices at memory device locations. The method also includes computing syndromes of the data; receiving a channel identifier of one of the channels; and removing a contribution of data received on the channel from the computed syndromes, the removing resulting in channel adjusted syndromes. The channel adjusted syndromes are decoded resulting in channel adjusted memory device locations of failing memory devices, the channel adjusted memory device locations corresponding to memory device locations.
摘要翻译： 在包括计算机实现的方法的冗余存储器系统中的错误校正和检测，所述方法包括接收包括纠错码（ECC）位的数据，从多个信道接收每个信道包括存储器设备位置处的多个存储器件。 该方法还包括计算数据的综合征; 接收一个频道的频道标识符; 以及从所计算的综合征中去除在所述信道上接收的数据的贡献，所述移除导致频道调整的综合征。 频道调整后的综合征被解码，导致故障存储器件的通道调整的存储器件位置，对应于存储器件位置的通道调整的存储器件位置。
-
-
-
-
-
-
-
-
-
搜索结果
129 条记录 (耗时 0.043 秒)
