公开(公告)号：US20090111291A1

公开(公告)日：2009-04-30

申请号：US12285639

申请日：2008-10-10

申请人： Jun Wan

发明人： Jun Wan

IPC分类号： H01R13/631 ,  H01R12/02

CPC分类号： H01R12/7076 ,  H01R12/87 ,  H01R13/639

摘要： An information storage card holding structure and an electric device using the same are provided. The electric device includes a circuit board and an information storage card holding structure. The holding structure, making an information storage card selectively electrically connected to several metallic points placed on a surface of the circuit board, includes a containing element, a crutch, a protrusion and a slide. The containing element contains the information storage card. The crutch supports the containing element. The slide is coupled to the protrusion. The protrusion is disposed on one of the containing element and the crutch. The slide is disposed on the other of the two. When the protrusion is located on a first regain track, the information storage card has a first gap to the surface. When the protrusion is located on a second regain track, the information storage card has a second gap to the surface.

摘要翻译： 提供了一种信息存储卡保持结构和使用其的电子装置。 电气设备包括电路板和信息存储卡保持结构。 保持结构使得选择性地电连接到放置在电路板的表面上的几个金属点的信息存储卡包括容纳元件，拐杖，突起和滑动件。 包含元素包含信息存储卡。 拐杖支撑容纳元件。 滑块联接到突起。 突出部设置在容纳元件和拐杖中的一个上。 幻灯片放置在两个的另一个上。 当突起位于第一恢复轨道上时，信息存储卡与表面具有第一间隙。 当突起位于第二恢复轨道上时，信息存储卡与表面具有第二间隙。

公开(公告)号：US20080316832A1

公开(公告)日：2008-12-25

申请号：US11766580

申请日：2007-06-21

申请人： Yupin Fong ,  Jun Wan

发明人： Yupin Fong ,  Jun Wan

IPC分类号： G11C16/10

CPC分类号： G11C16/349

摘要： To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have a constant pulse width and increasing magnitudes until a maximum voltage is reached. At that point, the magnitude of the programming pulses stops increasing and the programming pulses are applied in a manner to provide varying time duration of the programming signal between verification operations. In one embodiment, for example, after the pulses reach the maximum magnitude the pulse widths are increased. In another embodiment, after the pulses reach the maximum magnitude multiple program pulses are applied between verification operations.

摘要翻译： 为了对一组非易失性存储元件进行编程，将一组编程脉冲施加到非易失性存储元件的控制门（或其它终端）。 编程脉冲具有恒定的脉冲宽度和增加的幅度，直到达到最大电压。 在这一点上，编程脉冲的幅度停止增加，编程脉冲以一种方式施加，以便在验证操作之间提供编程信号的变化的持续时间。 在一个实施例中，例如，在脉冲达到最大幅度之后，脉冲宽度增加。 在另一个实施例中，在脉冲达到最大幅度之后，在验证操作之间施加多个编程脉冲。

公开(公告)号：US07454319B2

公开(公告)日：2008-11-18

申请号：US10717273

申请日：2003-11-19

申请人： Jun Wan ,  Chee-Keong Chong ,  Zhi Li

发明人： Jun Wan ,  Chee-Keong Chong ,  Zhi Li

IPC分类号： G06K9/36

CPC分类号： G06T17/20 ,  G06F17/5018

摘要： A system, method, and computer program product for measuring wall thickness. After an internal body topology of the model is generated, the topology is traversed between wall elements to determine wall thickness.

摘要翻译： 一种用于测量壁厚的系统，方法和计算机程序产品。 在生成模型的内部结构拓扑之后，在壁元素之间遍历拓扑以确定壁厚。

公开(公告)号：US07349258B2

公开(公告)日：2008-03-25

申请号：US11295776

申请日：2005-12-06

申请人： Yupin Fong ,  Jun Wan ,  Jeffrey Lutze

发明人： Yupin Fong ,  Jun Wan ,  Jeffrey Lutze

IPC分类号： G11C11/34

CPC分类号： G11C16/3418 ,  G11C16/3427

摘要： A system is disclosed for reducing or removing a form of read disturb in a non-volatile storage device. One embodiment seeks to prevent read disturb by eliminating or minimizing boosting of the channel of the memory elements. For example, one implementation prevents or reduces boosting of the source side of the NAND string channel during a read process. Because the source side of the NAND string channel is not boosted, at least one form of read disturb is minimized or does not occur.

公开(公告)号：US20070153573A1

公开(公告)日：2007-07-05

申请号：US11681188

申请日：2007-03-02

申请人： Yupin Fong ,  Jun Wan ,  Jeffrey Lutze

发明人： Yupin Fong ,  Jun Wan ,  Jeffrey Lutze

IPC分类号： G11C16/04 ,  G11C16/06 ,  G11C11/34

CPC分类号： G11C16/3418 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3427

摘要： A system is disclosed for reducing or removing a form of read disturb in a non-volatile storage device. One embodiment seeks to prevent read disturb by eliminating or minimizing boosting of the channel of the memory elements. For example, one implementation prevents or reduces boosting of the source side of the NAND string channel during a read process. Because the source side of the NAND string channel is not boosted, at least one form of read disturb is minimized or does not occur.

摘要翻译： 公开了一种用于减少或去除非易失性存储设备中的读取干扰形式的系统。 一个实施例旨在通过消除或最小化存储器元件的通道的升高来防止读取干扰。 例如，一个实施方式在读取过程期间防止或减少NAND串通道的源极侧的升压。 因为NAND串通道的源极侧不被提升，所以读取干扰的至少一种形式被最小化或不发生。

公开(公告)号：US07075360B1

公开(公告)日：2006-07-11

申请号：US10954698

申请日：2004-09-29

申请人： Peter R. Holloway ,  Jun Wan

发明人： Peter R. Holloway ,  Jun Wan

IPC分类号： G05F1/10

CPC分类号： G05F3/262

摘要： A super-PTAT current source receives a PTAT reference voltage as input. The PTAT reference voltage is combined with the gate-to-source voltage difference of two unequal-area input transistors and the combined voltage is imposed on a high negative temperature coefficient resistor to produce an output current that is super-PTAT. A current source supplies a bias current to the super-PTAT current source whereby excess current provided by the current source is consumed by closed loop adjustments. The super-PTAT current source generates a super-PTAT current having a constant slope, excellent stability and very good linearity. In one embodiment, the super-PTAT output current is mixed with a sub-PTAT current in a preselected ratio to generate output currents having exactly the desired temperature coefficient.

摘要翻译： 超级PTAT电流源接收PTAT参考电压作为输入。 PTAT参考电压与两个不等面积输入晶体管的栅极 - 源极电压差相结合，组合电压施加在高负温度系数电阻上，产生超级PTAT的输出电流。 电流源向超级PTAT电流源提供偏置电流，由此由电流源提供的过电流被闭环调节消耗。 超级PTAT电流源产生具有恒定斜率的超级PTAT电流，优异的稳定性和非常好的线性度。 在一个实施例中，超级PTAT输出电流以预选比率与副PTAT电流混合，以产生具有所需温度系数的精确输出电流。

公开(公告)号：US06930495B1

公开(公告)日：2005-08-16

申请号：US10870200

申请日：2004-06-16

申请人： Eric D. Blom ,  Peter R. Holloway ,  Jun Wan ,  Stuart H. Urie

发明人： Eric D. Blom ,  Peter R. Holloway ,  Jun Wan ,  Stuart H. Urie

IPC分类号： G01R27/02 ,  G01R27/08

CPC分类号： G01R27/02

摘要： A digitizing ohmmeter system for providing a digital resistance measurement includes a current source for providing an excitation current to an impedance-varying input sensor and an ADC circuit including a charge-balancing modulator and a digital post processing circuit. The system utilizes synchronous AC excitation of the input sensor and an AC coupled analog-to-digital converter input. The digitizing ohmmeter system also implements correlated double sampling for noise cancellation to provide low noise and highly accurate analog-to-digital conversions. The ADC circuit includes a reference signal generator generating a resistance reference signal by time-sharing the excitation current with the input sensor. The digitizing ohmmeter system thereby realizes fully ratiometric operation such that neither a precise current source nor a precise voltage source is required for accurate resistance measurements.

摘要翻译： 用于提供数字电阻测量的数字化欧姆计系统包括用于向阻抗变化输入传感器提供励磁电流的电流源和包括电荷平衡调制器和数字后处理电路的ADC电路。 该系统利用输入传感器的同步交流励磁和交流耦合模数转换器输入。 数字化欧姆表系统还实现了相关的双重采样，用于噪声消除，以提供低噪声和高精度的模数转换。 ADC电路包括参考信号发生器，通过与输入传感器共享激励电流来产生电阻参考信号。 数字化欧姆表系统实现了完全比例的操作，使得精确的电阻测量不需要精确的电流源和精确的电压源。

公开(公告)号：US20150357764A1

公开(公告)日：2015-12-10

申请号：US14396738

申请日：2012-06-25

申请人： Jigao Qian ,  Jun Wan ,  Shangsheng Cai ,  Guangcai Hu

发明人： Jigao Qian ,  Jun Wan ,  Shangsheng Cai ,  Guangcai Hu

IPC分类号： H01R13/6581 ,  H01R13/629

CPC分类号： H01R13/6581 ,  H01R12/772 ,  H01R13/5829 ,  H01R13/629

摘要： The present invention discloses an electrical connector for fiat conductor which includes an insulating body and a shielding housing. Vertical insert slots corresponding to two notches of the flat conductor are provided on the insulating body. An elastic buckling piece is formed in the vertical insert slot of the insulating body. The elastic buckling piece comprises an elastic arm extending obliquely upward and a buckling part formed through extending downward from a tail end of the elastic arm. One end of the elastic arm is connected integrally to the insulating body.A fixture block is disposed on an inner wall surface of the vertical insert slot in a protruding manner. The fixture block is located at a free end side of the elastic arm, and the fixture block is located below the buckling part. After the flat conductor is inserted, the elastic buckling piece is pressed down until the buckling part is buckled below the fixture block of the insulating body. The structure is simple, and is easy to produce and manufacture. Meanwhile, the assembly is convenient and the assembled flat conductor is firm and does not come off easily. Therefore the production efficiency and the production quality are improved effectively.

摘要翻译： 本发明公开了一种用于平面导体的电连接器，其包括绝缘体和屏蔽壳体。 在绝缘体上设置有与扁平导体的两个凹口相对应的垂直插入槽。 在绝缘体的垂直插入槽中形成有弹性屈曲片。 弹性屈曲件包括向上倾斜延伸的弹性臂和从弹性臂的尾端向下延伸形成的弯曲部。 弹性臂的一端与绝缘体一体连接。固定块以突出的方式设置在垂直插入槽的内壁表面上。 固定块位于弹性臂的自由端侧，固定块位于屈曲部分的下方。 在扁平导体插入后，弹性屈曲片被压下直到屈曲部分弯曲到绝缘体的固定块的下方。 结构简单，易于生产和制造。 同时，组装方便，组装扁平导体牢固，不易脱落。 因此，有效地提高了生产效率和生产质量。

公开(公告)号：US09134327B2

公开(公告)日：2015-09-15

申请号：US13000303

申请日：2008-06-30

申请人： Nancy Yuk-Yu Ip ,  Zhenguo Wu ,  Jerry Hsueh-Ching Wang ,  Kit Yu Fu ,  Jun Wan

发明人： Nancy Yuk-Yu Ip ,  Zhenguo Wu ,  Jerry Hsueh-Ching Wang ,  Kit Yu Fu ,  Jun Wan

IPC分类号： C12Q1/42 ,  A61P25/28 ,  G01N33/68

CPC分类号： G01N33/6896 ,  G01N33/6872 ,  G01N2333/9121 ,  G01N2500/04 ,  G01N2500/10 ,  G01N2500/20 ,  Y10T436/143333

摘要： The invention provides Stat3 and Tyk2 targets that have importance for diagnosis of neurodegenerative diseases such as Alzheimer's disease. Stat3 and Tyk2 are also important as targets for drug development for neurodegenerative diseases.

摘要翻译： 本发明提供对诊断神经变性疾病如阿尔茨海默氏病具有重要意义的Stat3和Tyk2靶标。 Stat3和Tyk2也作为神经退行性疾病药物开发的目标是重要的。

公开(公告)号：US08792729B2

公开(公告)日：2014-07-29

申请号：US13537701

申请日：2012-06-29

申请人： Lu Bai ,  Jun Wan ,  Jing Dai ,  Shaobin Wang ,  Jim Piper ,  Costas Plakas

发明人： Lu Bai ,  Jun Wan ,  Jing Dai ,  Shaobin Wang ,  Jim Piper ,  Costas Plakas

IPC分类号： G06K9/62

CPC分类号： G06T3/0068

摘要： An image processing apparatus may include: a first registration device for performing, by taking a first input image of two overlapped input images having an overlapped area as a reference image, a first registration on a second input image to find, in the second input image, a second pixel which is matched with each first pixel located in the overlapped area of the reference image; an output pixel location determination device for calculating a location of an output pixel which is located in the overlapped area of the output image and corresponds to the first pixel, the locations of the first and second pixels being respectively weighted, and the shorter the distance from the first pixel to a non-overlapped area of the reference image is, the greater a weight of the location of the first pixel is; and an output pixel value determination device for calculating a pixel value.

摘要翻译： 图像处理装置可以包括：第一登记装置，用于通过将具有重叠区域的两个重叠输入图像的第一输入图像作为参考图像进行第一注册，以在第二输入图像中找到第一注册，以在第二输入图像 与位于参考图像的重叠区域中的每个第一像素匹配的第二像素; 输出像素位置确定装置，用于计算位于输出图像的重叠区域中并对应于第一像素的输出像素的位置，第一和第二像素的位置分别被加权，并且距离 参考图像的非重叠区域的第一像素是第一像素的位置的权重越大; 以及用于计算像素值的输出像素值确定装置。