公开(公告)号：US20090181477A1

公开(公告)日：2009-07-16

申请号：US12410428

申请日：2009-03-24

申请人： Tsu-Jae King ,  Victor Moroz

发明人： Tsu-Jae King ,  Victor Moroz

IPC分类号： H01L21/66

CPC分类号： H01L29/34 ,  H01L21/78 ,  H01L21/84 ,  H01L23/544 ,  H01L27/0886 ,  H01L27/1203 ,  H01L29/0653 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7843 ,  H01L29/785 ,  H01L2223/5446 ,  Y10S438/974

摘要： By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.

摘要翻译： 通过在具有预先存在的半导体材料的脊（即，“波纹状基板”）的基板上形成MOSFET，可以克服与常规半导体制造工艺相关的分辨率限制，并且可以可靠地实现高性能的低功率晶体管， 重复生产。 在实际的器件形成之前形成波纹状衬底可以使用通常不适于器件生产的高精度技术来产生波纹衬底上的脊。 随后将高精度脊结合到其沟道区中的MOSFET通常将显示出比使用不能提供相同程度的图案精度的基于光刻技术形成的类似的MOSFET更精确和更少可变的性能。 附加的性能增强技术，例如脉冲形掺杂和“包裹”栅极可以与分段通道区域一起使用，以进一步提高器件性能。

公开(公告)号：US07528465B2

公开(公告)日：2009-05-05

申请号：US11673536

申请日：2007-02-09

申请人： Tsu-Jae King ,  Victor Moroz

发明人： Tsu-Jae King ,  Victor Moroz

IPC分类号： H01L29/06

CPC分类号： H01L29/34 ,  H01L21/78 ,  H01L21/84 ,  H01L23/544 ,  H01L27/0886 ,  H01L27/1203 ,  H01L29/0653 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7843 ,  H01L29/785 ,  H01L2223/5446 ,  Y10S438/974

摘要： By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.

摘要翻译： 通过在具有预先存在的半导体材料的脊（即，“波纹状基板”）的基板上形成MOSFET，可以克服与常规半导体制造工艺相关的分辨率限制，并且可以可靠地实现高性能的低功率晶体管， 重复生产。 在实际的器件形成之前形成波纹状衬底可以使用通常不适于器件生产的高精度技术来产生波纹衬底上的脊。 随后将高精度脊结合到其沟道区中的MOSFET通常将显示出比使用不能提供相同程度的图案精度的基于光刻技术形成的类似的MOSFET更精确和更少可变的性能。 附加的性能增强技术，例如脉冲形掺杂和“包裹”栅极可以与分段通道区域一起使用，以进一步提高器件性能。

公开(公告)号：US20080299735A1

公开(公告)日：2008-12-04

申请号：US12176274

申请日：2008-07-18

申请人： FARAN NOURI ,  Lori D. Washington ,  Victor Moroz

发明人： FARAN NOURI ,  Lori D. Washington ,  Victor Moroz

IPC分类号： H01L21/336

CPC分类号： H01L29/66636 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/7848

摘要： Methods are provided for depositing materials in forming semiconductor devices on a substrate, such as metal oxide transistors. In one embodiment, the invention generally provides a method of processing a substrate including forming a gate dielectric on a substrate having a first conductivity, forming a gate electrode on the gate dielectric, forming a first pair of sidewall spacers along laterally opposite sidewalls of the gate electrode, etching a pair of source/drain region definitions on opposite sides of the electrode, depositing a silicon-germanium material selectively in the source/drain region definitions, and implanting a dopant in the deposited silicon-germanium material to form a source/drain region having a second conductivity.

摘要翻译： 提供了用于在诸如金属氧化物晶体管的衬底上形成半导体器件中沉积材料的方法。 在一个实施例中，本发明通常提供一种处理衬底的方法，包括在具有第一导电性的衬底上形成栅极电介质，在栅极电介质上形成栅电极，在栅极的横向相对的侧壁上形成第一对侧壁间隔物 在电极的相对侧蚀刻一对源/漏区定义，在源/漏区定义中选择性地沉积硅 - 锗材料，以及在沉积的硅 - 锗材料中注入掺杂剂以形成源极/漏极 区域具有第二导电性。

公开(公告)号：US20080290470A1

公开(公告)日：2008-11-27

申请号：US12178495

申请日：2008-07-23

申请人： Tsu-Jae King ,  Victor Moroz

发明人： Tsu-Jae King ,  Victor Moroz

IPC分类号： H01L29/06

CPC分类号： H01L29/34 ,  H01L21/78 ,  H01L21/84 ,  H01L23/544 ,  H01L27/0886 ,  H01L27/1203 ,  H01L29/0653 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7843 ,  H01L29/785 ,  H01L2223/5446 ,  Y10S438/974

摘要： By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.

摘要翻译： 通过在具有预先存在的半导体材料的脊（即，“波纹状基板”）的基板上形成MOSFET，可以克服与常规半导体制造工艺相关的分辨率限制，并且可以可靠地实现高性能的低功率晶体管， 重复生产。 在实际的器件形成之前形成波纹状衬底可以使用通常不适于器件生产的高精度技术来产生波纹衬底上的脊。 随后将高精度脊结合到其沟道区中的MOSFET通常将显示出比使用不能提供相同程度的图案精度的基于光刻技术形成的类似的MOSFET更精确和更少可变的性能。 附加的性能增强技术，例如脉冲形掺杂和“包裹”栅极可以与分段通道区域一起使用，以进一步提高器件性能。

公开(公告)号：US07302375B2

公开(公告)日：2007-11-27

申请号：US10929286

申请日：2004-08-30

申请人： Andrey Kucherov ,  Victor Moroz

发明人： Andrey Kucherov ,  Victor Moroz

IPC分类号： G06F7/60 ,  G06F17/50 ,  G01V1/40

CPC分类号： G06F17/5036

摘要： Roughly described, a method for numerically solving a system of equations of the form 0=F(X), for a solution vector X which involves choosing a starting value X0 and iterating Xn+1=Xn−[F′(Xn)+σnDiag F′(Xn)]−1F(Xn). In this iteration, at least one σn is a number greater than 0. Preferably, σn=min {β/n, [αn/(1+nαn)]∥F(Xn)∥}, where β is a constant that remains fixed for all n, and αn=∥F(Xn)∥/∥F(Xn−1)∥.

摘要翻译： 粗略地描述了一种用于数学求解形式为<？in-line-formula description =“In-line Formulas”end =“lead”？> 0 = F（X），<？in-line- 对于解决方案向量X的公式描述=“内联公式”end =“tail”？>，其涉及选择起始值X <0>和迭代<？in-line-formula description =“In- 线公式“end =”lead“？> X n + 1 = X n - [F'（X N n N）+ sigma _{Di ag ag ag ag>>>>>>>>>>>>>>。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。 description =“In-line Formulas”end =“tail”？>在此迭代中，至少一个sigma 是大于0的数字。优选地，<？in-line-formula description =“ 在线公式“end =”lead“？> sigma = min {β/ n，[α/ N] /（1 + nalpha n >）]‖F（X n n））‖}，<？在线公式描述=“在线公式”end =“tail”？>其中β是常数， 全部n和<？in-line-formula description =“In-line Formulas”end =“lead”？> alpha /SUB>=‖F(Xn)|||||F(Xn-1） “end =”tail“？>}

公开(公告)号：US20070004113A1

公开(公告)日：2007-01-04

申请号：US11173230

申请日：2005-07-01

申请人： Tsu-Jae King ,  Victor Moroz

发明人： Tsu-Jae King ,  Victor Moroz

IPC分类号： H01L21/8234

CPC分类号： H01L29/785 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/845 ,  H01L27/0207 ,  H01L27/1203 ,  H01L29/66795 ,  H01L29/7843

摘要： By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.

公开(公告)号：US20070001237A1

公开(公告)日：2007-01-04

申请号：US11173237

申请日：2005-07-01

申请人： Tsu-Jae King ,  Victor Moroz

发明人： Tsu-Jae King ,  Victor Moroz

IPC分类号： H01L29/76

CPC分类号： H01L27/0207 ,  H01L21/823807 ,  H01L21/823821 ,  H01L29/66795 ,  H01L29/785

摘要： By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.

公开(公告)号：US20070001232A1

公开(公告)日：2007-01-04

申请号：US11173231

申请日：2005-07-01

申请人： Tsu-Jae King ,  Victor Moroz

发明人： Tsu-Jae King ,  Victor Moroz

IPC分类号： H01L29/94

CPC分类号： H01L29/34 ,  H01L21/78 ,  H01L21/84 ,  H01L23/544 ,  H01L27/0886 ,  H01L27/1203 ,  H01L29/0653 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7843 ,  H01L29/785 ,  H01L2223/5446 ,  Y10S438/974

摘要： By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.

摘要翻译： 通过在具有预先存在的半导体材料的脊（即，“波纹状基板”）的基板上形成MOSFET，可以克服与常规半导体制造工艺相关的分辨率限制，并且可以可靠地实现高性能的低功率晶体管， 重复生产。 在实际的器件形成之前形成波纹状衬底可以使用通常不适于器件生产的高精度技术来产生波纹衬底上的脊。 随后将高精度脊结合到其沟道区中的MOSFET通常将显示出比使用不能提供相同程度的图案精度的基于光刻技术形成的类似的MOSFET更精确和更少可变的性能。 附加的性能增强技术，例如脉冲形掺杂和“包裹”栅极可以与分段通道区域一起使用，以进一步提高器件性能。

公开(公告)号：US20050287752A1

公开(公告)日：2005-12-29

申请号：US11123588

申请日：2005-05-06

申请人： Faran Nouri ,  Lori Washington ,  Victor Moroz

发明人： Faran Nouri ,  Lori Washington ,  Victor Moroz

IPC分类号： H01L21/336 ,  H01L29/165

CPC分类号： H01L29/66636 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/7848

摘要： Methods are provided for depositing materials in forming semiconductor devices on a substrate, such as metal oxide transistors. In one embodiment, the invention generally provides a method of processing a substrate including forming a gate dielectric on a substrate having a first conductivity, forming a gate electrode on the gate dielectric, forming a first pair of sidewall spacers along laterally opposite sidewalls of the gate electrode, etching a pair of source/drain region definitions on opposite sides of the electrode, depositing a silicon-germanium material selectively in the source/drain region definitions, and implanting a dopant in the deposited silicon-germanium material to form a source/drain region having a second conductivity.

摘要翻译： 提供了用于在诸如金属氧化物晶体管的衬底上形成半导体器件中沉积材料的方法。 在一个实施例中，本发明通常提供一种处理衬底的方法，包括在具有第一导电性的衬底上形成栅极电介质，在栅极电介质上形成栅电极，在栅极的横向相对的侧壁上形成第一对侧壁间隔物 在电极的相对侧蚀刻一对源/漏区定义，在源/漏区定义中选择性地沉积硅 - 锗材料，以及在沉积的硅 - 锗材料中注入掺杂剂以形成源极/漏极 区域具有第二导电性。

公开(公告)号：US08786057B2

公开(公告)日：2014-07-22

申请号：US12178495

申请日：2008-07-23

申请人： Tsu-Jae King ,  Victor Moroz

发明人： Tsu-Jae King ,  Victor Moroz

IPC分类号： H01L29/06

CPC分类号： H01L29/34 ,  H01L21/78 ,  H01L21/84 ,  H01L23/544 ,  H01L27/0886 ,  H01L27/1203 ,  H01L29/0653 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7843 ,  H01L29/785 ,  H01L2223/5446 ,  Y10S438/974

摘要： By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.

摘要翻译： 通过在具有预先存在的半导体材料的脊（即，“波纹状基板”）的基板上形成MOSFET，可以克服与常规半导体制造工艺相关的分辨率限制，并且可以可靠地实现高性能的低功率晶体管， 重复生产。 在实际的器件形成之前形成波纹状衬底可以使用通常不适于器件生产的高精度技术来产生波纹衬底上的脊。 随后将高精度脊结合到其沟道区中的MOSFET通常将显示出比使用不能提供相同程度的图案精度的基于光刻技术形成的类似的MOSFET更精确和更少可变的性能。 附加的性能增强技术，例如脉冲形掺杂和“包裹”栅极可以与分段通道区域一起使用，以进一步提高器件性能。